From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AFE6C2D0C0 for ; Mon, 30 Dec 2019 02:06:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DB17420748 for ; Mon, 30 Dec 2019 02:06:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726729AbfL3CGZ (ORCPT ); Sun, 29 Dec 2019 21:06:25 -0500 Received: from mga05.intel.com ([192.55.52.43]:50803 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726343AbfL3CGZ (ORCPT ); Sun, 29 Dec 2019 21:06:25 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Dec 2019 18:06:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,373,1571727600"; d="scan'208";a="213197253" Received: from linux.intel.com ([10.54.29.200]) by orsmga008.jf.intel.com with ESMTP; 29 Dec 2019 18:06:22 -0800 Received: from [10.226.38.14] (unknown [10.226.38.14]) by linux.intel.com (Postfix) with ESMTP id 57AEB5803C5; Sun, 29 Dec 2019 18:06:20 -0800 (PST) Subject: Re: [PATCH v5 2/2] spi: cadence-quadpsi: Add support for the Cadence QSPI controller To: Dan Carpenter , kbuild@lists.01.org Cc: kbuild-all@lists.01.org, broonie@kernel.org, vigneshr@ti.com, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, cheol.yong.kim@intel.com, qi-ming.wu@intel.com References: <20191229174947.GB3889@kadam> From: "Ramuthevar, Vadivel MuruganX" Message-ID: Date: Mon, 30 Dec 2019 10:06:19 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.9.1 MIME-Version: 1.0 In-Reply-To: <20191229174947.GB3889@kadam> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 30/12/2019 1:49 AM, Dan Carpenter wrote: > Hi "Ramuthevar,Vadivel, > > Thank you for the patch! Perhaps something to improve: > > [auto build test WARNING on spi/for-next] > [cannot apply to v5.5-rc3 next-20191219] > [if your patch is applied to the wrong git tree, please drop us a note to help > improve the system. BTW, we also suggest to use '--base' option to specify the > base tree in git format-patch, please see https://stackoverflow.com/a/37406982] > > url: https://github.com/0day-ci/linux/commits/Ramuthevar-Vadivel-MuruganX/spi-cadence-quadpsi-Add-support-for-the-Cadence-QSPI-controller/20191226-152805 > base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot > Reported-by: Dan Carpenter Thanks for the review,  kernel base : 5.5-rc1 since the maintainer tree also the same. > smatch warnings: > drivers/spi/spi-cadence-quadspi.c:412 cqspi_read_execute() warn: if statement not indented > drivers/spi/spi-cadence-quadspi.c:1015 cqspi_probe() error: we previously assumed 'pdata' could be null (see line 1004) sure, will fix it. --- With Best Regards Vadivel Murugan > # https://github.com/0day-ci/linux/commit/7d7e98888a40e593dcd442db83b53d92980c036f > git remote add linux-review https://github.com/0day-ci/linux > git remote update linux-review > git checkout 7d7e98888a40e593dcd442db83b53d92980c036f > vim +412 drivers/spi/spi-cadence-quadspi.c > > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 381 static int cqspi_read_execute(struct struct_cqspi *cqspi, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 382 const struct spi_mem_op *op, u8 *rxbuf) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 383 { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 384 struct platform_device *pdev = cqspi->pdev; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 385 struct cqspi_platform_data *pdata = pdev->dev.platform_data; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 386 void *reg_base = cqspi->iobase; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 387 void *ahb_base = cqspi->qspi_ahb_virt; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 388 u32 rxlen = op->data.nbytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 389 u8 *rxbuf_end = rxbuf + rxlen; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 390 u32 mod_bytes = rxlen % 4; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 391 u32 bytes_to_read = 0; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 392 int remaining = op->data.nbytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 393 unsigned long timeout; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 394 int ret; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 395 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 396 writel(remaining, reg_base + CQSPI_REG_INDIRECTRDBYTES); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 397 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 398 mb();/* flush previous writes */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 399 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 400 writel(pdata->fifo_depth - CQSPI_REG_SRAM_RESV_WORDS, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 401 reg_base + CQSPI_REG_SRAMPARTITION); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 402 /* Clear all interrupts. */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 403 writel(CQSPI_IRQ_STATUS_MASK, reg_base + CQSPI_REG_IRQSTATUS); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 404 writel(CQSPI_IRQ_MASK_RD, reg_base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 405 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 406 reinit_completion(&cqspi->transfer_complete); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 407 writel(CQSPI_REG_INDIRECTRD_START_MASK, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 408 reg_base + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 409 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 410 timeout = msecs_to_jiffies(CQSPI_READ_TIMEOUT_MS); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 411 while (remaining > 0) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 @412 if (!wait_for_completion_timeout(&cqspi->transfer_complete, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 413 timeout)) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 414 ret = -ETIMEDOUT; > > This should be indented and "return -ETIMEDOUT;" or a break or > something? > > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 415 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 416 bytes_to_read = CQSPI_GET_RD_SRAM_LEVEL(reg_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 417 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 418 while (bytes_to_read != 0) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 419 unsigned int word_remain = round_down(remaining, 4); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 420 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 421 bytes_to_read *= CQSPI_FIFO_WIDTH; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 422 bytes_to_read = bytes_to_read > remaining ? > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 423 remaining : bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 424 bytes_to_read = round_down(bytes_to_read, 4); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 425 if (bytes_to_read) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 426 ioread32_rep(ahb_base, rxbuf, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 427 (bytes_to_read / 4)); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 428 } else if (!word_remain && mod_bytes) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 429 unsigned int temp = ioread32(ahb_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 430 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 431 bytes_to_read = mod_bytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 432 memcpy(rxbuf, &temp, min((unsigned int) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 433 (rxbuf_end - rxbuf), bytes_to_read)); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 434 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 435 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 436 rxbuf += bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 437 remaining -= bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 438 bytes_to_read = CQSPI_GET_RD_SRAM_LEVEL(reg_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 439 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 440 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 441 if (remaining < 0) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 442 reinit_completion(&cqspi->transfer_complete); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 443 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 444 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 445 /* Check indirect done status */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 446 ret = cqspi_wait_for_bit(reg_base + CQSPI_REG_INDIRECTRD, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 447 CQSPI_REG_INDIRECTRD_DONE_MASK, 0); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 448 if (ret) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 449 dev_err(&pdev->dev, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 450 "Indirect read completion error (%i)\n", ret); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 451 goto failrd; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 452 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 453 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 454 /* Disable interrupt */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 455 writel(0, reg_base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 456 /* Clear indirect completion status */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 457 writel(CQSPI_REG_INDIRECTRD_DONE_MASK, reg_base + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 458 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 459 return 0; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 460 failrd: > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 461 /* Disable interrupt */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 462 writel(0, reg_base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 463 /* Cancel the indirect read */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 464 writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 465 reg_base + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 466 return ret; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 467 } > > --- > 0-DAY kernel test infrastructure Open Source Technology Center > https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Ramuthevar, Vadivel MuruganX" Subject: Re: [PATCH v5 2/2] spi: cadence-quadpsi: Add support for the Cadence QSPI controller Date: Mon, 30 Dec 2019 10:06:19 +0800 Message-ID: References: <20191229174947.GB3889@kadam> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Cc: kbuild-all@lists.01.org, broonie@kernel.org, vigneshr@ti.com, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, cheol.yong.kim@intel.com, qi-ming.wu@intel.com To: Dan Carpenter , kbuild@lists.01.org Return-path: In-Reply-To: <20191229174947.GB3889@kadam> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-Id: linux-spi.vger.kernel.org Hi, On 30/12/2019 1:49 AM, Dan Carpenter wrote: > Hi "Ramuthevar,Vadivel, > > Thank you for the patch! Perhaps something to improve: > > [auto build test WARNING on spi/for-next] > [cannot apply to v5.5-rc3 next-20191219] > [if your patch is applied to the wrong git tree, please drop us a note to help > improve the system. BTW, we also suggest to use '--base' option to specify the > base tree in git format-patch, please see https://stackoverflow.com/a/37406982] > > url: https://github.com/0day-ci/linux/commits/Ramuthevar-Vadivel-MuruganX/spi-cadence-quadpsi-Add-support-for-the-Cadence-QSPI-controller/20191226-152805 > base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot > Reported-by: Dan Carpenter Thanks for the review,  kernel base : 5.5-rc1 since the maintainer tree also the same. > smatch warnings: > drivers/spi/spi-cadence-quadspi.c:412 cqspi_read_execute() warn: if statement not indented > drivers/spi/spi-cadence-quadspi.c:1015 cqspi_probe() error: we previously assumed 'pdata' could be null (see line 1004) sure, will fix it. --- With Best Regards Vadivel Murugan > # https://github.com/0day-ci/linux/commit/7d7e98888a40e593dcd442db83b53d92980c036f > git remote add linux-review https://github.com/0day-ci/linux > git remote update linux-review > git checkout 7d7e98888a40e593dcd442db83b53d92980c036f > vim +412 drivers/spi/spi-cadence-quadspi.c > > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 381 static int cqspi_read_execute(struct struct_cqspi *cqspi, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 382 const struct spi_mem_op *op, u8 *rxbuf) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 383 { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 384 struct platform_device *pdev = cqspi->pdev; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 385 struct cqspi_platform_data *pdata = pdev->dev.platform_data; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 386 void *reg_base = cqspi->iobase; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 387 void *ahb_base = cqspi->qspi_ahb_virt; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 388 u32 rxlen = op->data.nbytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 389 u8 *rxbuf_end = rxbuf + rxlen; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 390 u32 mod_bytes = rxlen % 4; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 391 u32 bytes_to_read = 0; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 392 int remaining = op->data.nbytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 393 unsigned long timeout; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 394 int ret; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 395 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 396 writel(remaining, reg_base + CQSPI_REG_INDIRECTRDBYTES); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 397 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 398 mb();/* flush previous writes */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 399 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 400 writel(pdata->fifo_depth - CQSPI_REG_SRAM_RESV_WORDS, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 401 reg_base + CQSPI_REG_SRAMPARTITION); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 402 /* Clear all interrupts. */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 403 writel(CQSPI_IRQ_STATUS_MASK, reg_base + CQSPI_REG_IRQSTATUS); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 404 writel(CQSPI_IRQ_MASK_RD, reg_base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 405 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 406 reinit_completion(&cqspi->transfer_complete); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 407 writel(CQSPI_REG_INDIRECTRD_START_MASK, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 408 reg_base + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 409 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 410 timeout = msecs_to_jiffies(CQSPI_READ_TIMEOUT_MS); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 411 while (remaining > 0) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 @412 if (!wait_for_completion_timeout(&cqspi->transfer_complete, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 413 timeout)) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 414 ret = -ETIMEDOUT; > > This should be indented and "return -ETIMEDOUT;" or a break or > something? > > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 415 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 416 bytes_to_read = CQSPI_GET_RD_SRAM_LEVEL(reg_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 417 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 418 while (bytes_to_read != 0) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 419 unsigned int word_remain = round_down(remaining, 4); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 420 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 421 bytes_to_read *= CQSPI_FIFO_WIDTH; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 422 bytes_to_read = bytes_to_read > remaining ? > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 423 remaining : bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 424 bytes_to_read = round_down(bytes_to_read, 4); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 425 if (bytes_to_read) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 426 ioread32_rep(ahb_base, rxbuf, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 427 (bytes_to_read / 4)); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 428 } else if (!word_remain && mod_bytes) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 429 unsigned int temp = ioread32(ahb_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 430 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 431 bytes_to_read = mod_bytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 432 memcpy(rxbuf, &temp, min((unsigned int) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 433 (rxbuf_end - rxbuf), bytes_to_read)); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 434 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 435 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 436 rxbuf += bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 437 remaining -= bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 438 bytes_to_read = CQSPI_GET_RD_SRAM_LEVEL(reg_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 439 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 440 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 441 if (remaining < 0) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 442 reinit_completion(&cqspi->transfer_complete); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 443 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 444 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 445 /* Check indirect done status */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 446 ret = cqspi_wait_for_bit(reg_base + CQSPI_REG_INDIRECTRD, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 447 CQSPI_REG_INDIRECTRD_DONE_MASK, 0); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 448 if (ret) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 449 dev_err(&pdev->dev, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 450 "Indirect read completion error (%i)\n", ret); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 451 goto failrd; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 452 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 453 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 454 /* Disable interrupt */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 455 writel(0, reg_base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 456 /* Clear indirect completion status */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 457 writel(CQSPI_REG_INDIRECTRD_DONE_MASK, reg_base + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 458 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 459 return 0; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 460 failrd: > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 461 /* Disable interrupt */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 462 writel(0, reg_base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 463 /* Cancel the indirect read */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 464 writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 465 reg_base + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 466 return ret; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 467 } > > --- > 0-DAY kernel test infrastructure Open Source Technology Center > https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============2496789318661752263==" MIME-Version: 1.0 From: Ramuthevar, Vadivel MuruganX To: kbuild-all@lists.01.org Subject: Re: [PATCH v5 2/2] spi: cadence-quadpsi: Add support for the Cadence QSPI controller Date: Mon, 30 Dec 2019 10:06:19 +0800 Message-ID: In-Reply-To: <20191229174947.GB3889@kadam> List-Id: --===============2496789318661752263== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Hi, On 30/12/2019 1:49 AM, Dan Carpenter wrote: > Hi "Ramuthevar,Vadivel, > > Thank you for the patch! Perhaps something to improve: > > [auto build test WARNING on spi/for-next] > [cannot apply to v5.5-rc3 next-20191219] > [if your patch is applied to the wrong git tree, please drop us a note to= help > improve the system. BTW, we also suggest to use '--base' option to specif= y the > base tree in git format-patch, please see https://stackoverflow.com/a/374= 06982] > > url: https://github.com/0day-ci/linux/commits/Ramuthevar-Vadivel-Murug= anX/spi-cadence-quadpsi-Add-support-for-the-Cadence-QSPI-controller/2019122= 6-152805 > base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git f= or-next > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot > Reported-by: Dan Carpenter Thanks for the review,=C2=A0 kernel base : 5.5-rc1 since the maintainer tre= e = also the same. > smatch warnings: > drivers/spi/spi-cadence-quadspi.c:412 cqspi_read_execute() warn: if state= ment not indented > drivers/spi/spi-cadence-quadspi.c:1015 cqspi_probe() error: we previously= assumed 'pdata' could be null (see line 1004) sure, will fix it. --- With Best Regards Vadivel Murugan > # https://github.com/0day-ci/linux/commit/7d7e98888a40e593dcd442db83b53d9= 2980c036f > git remote add linux-review https://github.com/0day-ci/linux > git remote update linux-review > git checkout 7d7e98888a40e593dcd442db83b53d92980c036f > vim +412 drivers/spi/spi-cadence-quadspi.c > > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 381 static int cqs= pi_read_execute(struct struct_cqspi *cqspi, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 382 const= struct spi_mem_op *op, u8 *rxbuf) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 383 { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 384 struct platfo= rm_device *pdev =3D cqspi->pdev; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 385 struct cqspi_= platform_data *pdata =3D pdev->dev.platform_data; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 386 void *reg_bas= e =3D cqspi->iobase; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 387 void *ahb_bas= e =3D cqspi->qspi_ahb_virt; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 388 u32 rxlen =3D= op->data.nbytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 389 u8 *rxbuf_end= =3D rxbuf + rxlen; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 390 u32 mod_bytes= =3D rxlen % 4; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 391 u32 bytes_to_= read =3D 0; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 392 int remaining= =3D op->data.nbytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 393 unsigned long= timeout; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 394 int ret; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 395 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 396 writel(remain= ing, reg_base + CQSPI_REG_INDIRECTRDBYTES); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 397 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 398 mb();/* flush= previous writes */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 399 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 400 writel(pdata-= >fifo_depth - CQSPI_REG_SRAM_RESV_WORDS, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 401 reg_ba= se + CQSPI_REG_SRAMPARTITION); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 402 /* Clear all = interrupts. */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 403 writel(CQSPI_= IRQ_STATUS_MASK, reg_base + CQSPI_REG_IRQSTATUS); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 404 writel(CQSPI_= IRQ_MASK_RD, reg_base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 405 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 406 reinit_comple= tion(&cqspi->transfer_complete); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 407 writel(CQSPI_= REG_INDIRECTRD_START_MASK, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 408 reg_ba= se + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 409 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 410 timeout =3D m= secs_to_jiffies(CQSPI_READ_TIMEOUT_MS); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 411 while (remain= ing > 0) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 @412 if (!wait_fo= r_completion_timeout(&cqspi->transfer_complete, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 413 timeout= )) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 414 ret =3D -ETI= MEDOUT; > > This should be indented and "return -ETIMEDOUT;" or a break or > something? > > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 415 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 416 bytes_to_rea= d =3D CQSPI_GET_RD_SRAM_LEVEL(reg_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 417 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 418 while (bytes= _to_read !=3D 0) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 419 unsigned in= t word_remain =3D round_down(remaining, 4); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 420 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 421 bytes_to_re= ad *=3D CQSPI_FIFO_WIDTH; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 422 bytes_to_re= ad =3D bytes_to_read > remaining ? > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 423 remainin= g : bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 424 bytes_to_re= ad =3D round_down(bytes_to_read, 4); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 425 if (bytes_t= o_read) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 426 ioread32_r= ep(ahb_base, rxbuf, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 427 (byt= es_to_read / 4)); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 428 } else if (= !word_remain && mod_bytes) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 429 unsigned i= nt temp =3D ioread32(ahb_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 430 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 431 bytes_to_r= ead =3D mod_bytes; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 432 memcpy(rxb= uf, &temp, min((unsigned int) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 433 (rx= buf_end - rxbuf), bytes_to_read)); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 434 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 435 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 436 rxbuf +=3D = bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 437 remaining -= =3D bytes_to_read; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 438 bytes_to_re= ad =3D CQSPI_GET_RD_SRAM_LEVEL(reg_base); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 439 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 440 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 441 if (remainin= g < 0) > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 442 reinit_comp= letion(&cqspi->transfer_complete); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 443 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 444 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 445 /* Check indi= rect done status */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 446 ret =3D cqspi= _wait_for_bit(reg_base + CQSPI_REG_INDIRECTRD, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 447 CQSPI_REG= _INDIRECTRD_DONE_MASK, 0); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 448 if (ret) { > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 449 dev_err(&pde= v->dev, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 450 "Indirect r= ead completion error (%i)\n", ret); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 451 goto failrd; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 452 } > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 453 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 454 /* Disable in= terrupt */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 455 writel(0, reg= _base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 456 /* Clear indi= rect completion status */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 457 writel(CQSPI_= REG_INDIRECTRD_DONE_MASK, reg_base + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 458 > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 459 return 0; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 460 failrd: > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 461 /* Disable in= terrupt */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 462 writel(0, reg= _base + CQSPI_REG_IRQMASK); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 463 /* Cancel the= indirect read */ > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 464 writel(CQSPI_= REG_INDIRECTWR_CANCEL_MASK, > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 465 reg_ba= se + CQSPI_REG_INDIRECTRD); > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 466 return ret; > 7d7e98888a40e5 Ramuthevar Vadivel Murugan 2019-12-26 467 } > > --- > 0-DAY kernel test infrastructure Open Source Technology C= enter > https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org Intel Corp= oration --===============2496789318661752263==--