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([2a01:e34:ed2f:f020:7191:566f:2b5:22f1]) by smtp.googlemail.com with ESMTPSA id n7sm245151wro.68.2021.12.09.08.57.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 09 Dec 2021 08:57:36 -0800 (PST) Subject: Re: [PATCH 6/7] thermal: netlink: Add a new event to notify CPU capabilities change To: Ricardo Neri Cc: "Rafael J. Wysocki" , linux-pm@vger.kernel.org, x86@kernel.org, linux-doc@vger.kernel.org, Len Brown , Srinivas Pandruvada , Aubrey Li , Amit Kucheria , Andi Kleen , Tim Chen , "Ravi V. Shankar" , Ricardo Neri , linux-kernel@vger.kernel.org References: <20211106013312.26698-1-ricardo.neri-calderon@linux.intel.com> <20211106013312.26698-7-ricardo.neri-calderon@linux.intel.com> <20211209160346.GA7692@ranerica-svr.sc.intel.com> From: Daniel Lezcano Message-ID: Date: Thu, 9 Dec 2021 17:57:35 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20211209160346.GA7692@ranerica-svr.sc.intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/12/2021 17:03, Ricardo Neri wrote: > On Tue, Nov 30, 2021 at 10:29:46AM +0100, Daniel Lezcano wrote: >> On 06/11/2021 02:33, Ricardo Neri wrote: >>> From: Srinivas Pandruvada >>> >>> Add a new netlink event to notify change in CPU capabilities in terms of >>> performance and efficiency. >>> >>> Firmware may change CPU capabilities as a result of thermal events in the >>> system or to account for changes in the TDP (thermal design power) level. >>> >>> This notification type will allow user space to avoid running workloads >>> on certain CPUs or proactively adjust power limits to avoid future events. >>> >> >> [ ... ] >> >>> + [THERMAL_GENL_ATTR_CPU_CAPABILITY_ID] = { .type = NLA_U32 }, >>> + [THERMAL_GENL_ATTR_CPU_CAPABILITY_PERF] = { .type = NLA_U32 }, >>> + [THERMAL_GENL_ATTR_CPU_CAPABILITY_EFF] = { .type = NLA_U32 }, >>> }; >> >> AFAIU, 0 <= perf < 256 and 0 <= eff < 256, right? >> >> Is the following true? >> >> 0 <= perf + eff < 256 > > No, they are not. They are set independently. I understand they can be set independently but is the constraint above correct? For example, can the system send perf=255 and eff=255 or perf=0 and eff=0 ? May be I misunderstood but I was expecting at least some kind of connection between perf and eff (when eff is high, perf is low and the opposite). -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog