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From: Jan Beulich <jbeulich@suse.com>
To: Simone Ballarin <simone.ballarin@bugseng.com>
Cc: consulting@bugseng.com,
	"Gianluca Luparini" <gianluca.luparini@bugseng.com>,
	"Jun Nakajima" <jun.nakajima@intel.com>,
	"Kevin Tian" <kevin.tian@intel.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Xenia Ragiadakou" <Xenia.Ragiadakou@amd.com>,
	"Ayan Kumar Halder" <ayan.kumar.halder@amd.com>,
	xen-devel@lists.xenproject.org
Subject: Re: [XEN PATCH v2 07/13] x86/vmx: fix violations of MISRA C:2012 Rule 7.2
Date: Thu, 6 Jul 2023 10:04:29 +0200	[thread overview]
Message-ID: <f3b6170a-db0d-ef00-b3f8-7deba17b9fe2@suse.com> (raw)
In-Reply-To: <f30ef7c2cda2516d9ef07bb79e5da5513cd90c6c.1688559115.git.gianluca.luparini@bugseng.com>

On 05.07.2023 17:26, Simone Ballarin wrote:
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -257,14 +257,14 @@ uint64_t get_vvmcs_virtual(void *vvmcs, uint32_t vmcs_encoding)
>  
>      switch ( enc.width ) {
>      case VVMCS_WIDTH_16:
> -        res &= 0xffff;
> +        res &= 0xffffU;

I don't think the suffix is needed in cases like this one, and ...

>          break;
>     case VVMCS_WIDTH_64:
>          if ( enc.access_type )
>              res >>= 32;
>          break;
>      case VVMCS_WIDTH_32:
> -        res &= 0xffffffff;
> +        res &= 0xffffffffU;

... while generally I'm suggesting to avoid casts I wonder whether
casting to uint32_t here wouldn't make things more obviously match
the purpose. (Same again further down then.)

> --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
> +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
> @@ -207,7 +207,7 @@ void vmx_vmcs_reload(struct vcpu *v);
>  #define CPU_BASED_ACTIVATE_MSR_BITMAP         0x10000000
>  #define CPU_BASED_MONITOR_EXITING             0x20000000
>  #define CPU_BASED_PAUSE_EXITING               0x40000000
> -#define CPU_BASED_ACTIVATE_SECONDARY_CONTROLS 0x80000000
> +#define CPU_BASED_ACTIVATE_SECONDARY_CONTROLS 0x80000000U

Interesting - you don't change adjacent #define-s here, nor ...

> @@ -257,7 +257,7 @@ extern u32 vmx_vmentry_control;
>  #define SECONDARY_EXEC_XSAVES                   0x00100000
>  #define SECONDARY_EXEC_TSC_SCALING              0x02000000
>  #define SECONDARY_EXEC_BUS_LOCK_DETECTION       0x40000000
> -#define SECONDARY_EXEC_NOTIFY_VM_EXITING        0x80000000
> +#define SECONDARY_EXEC_NOTIFY_VM_EXITING        0x80000000U

... here. May I ask why that is? (I'm not opposed, but the
description suggests otherwise.)

> --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> @@ -136,7 +136,7 @@ static inline void pi_clear_sn(struct pi_desc *pi_desc)
>  /*
>   * Exit Reasons
>   */
> -#define VMX_EXIT_REASONS_FAILED_VMENTRY 0x80000000
> +#define VMX_EXIT_REASONS_FAILED_VMENTRY 0x80000000U
>  #define VMX_EXIT_REASONS_BUS_LOCK       (1u << 26)

Along the lines of the latter, perhaps switch to 1u << 31?

> @@ -246,15 +246,15 @@ typedef union cr_access_qual {
>  /*
>   * Access Rights
>   */
> -#define X86_SEG_AR_SEG_TYPE     0xf        /* 3:0, segment type */
> -#define X86_SEG_AR_DESC_TYPE    (1u << 4)  /* 4, descriptor type */
> -#define X86_SEG_AR_DPL          0x60       /* 6:5, descriptor privilege level */
> -#define X86_SEG_AR_SEG_PRESENT  (1u << 7)  /* 7, segment present */
> -#define X86_SEG_AR_AVL          (1u << 12) /* 12, available for system software */
> -#define X86_SEG_AR_CS_LM_ACTIVE (1u << 13) /* 13, long mode active (CS only) */
> -#define X86_SEG_AR_DEF_OP_SIZE  (1u << 14) /* 14, default operation size */
> -#define X86_SEG_AR_GRANULARITY  (1u << 15) /* 15, granularity */
> -#define X86_SEG_AR_SEG_UNUSABLE (1u << 16) /* 16, segment unusable */
> +#define X86_SEG_AR_SEG_TYPE     0xfU       /* 3:0, segment type */
> +#define X86_SEG_AR_DESC_TYPE    (1U << 4)  /* 4, descriptor type */
> +#define X86_SEG_AR_DPL          0x60U      /* 6:5, descriptor privilege level */
> +#define X86_SEG_AR_SEG_PRESENT  (1U << 7)  /* 7, segment present */
> +#define X86_SEG_AR_AVL          (1U << 12) /* 12, available for system software */
> +#define X86_SEG_AR_CS_LM_ACTIVE (1U << 13) /* 13, long mode active (CS only) */
> +#define X86_SEG_AR_DEF_OP_SIZE  (1U << 14) /* 14, default operation size */
> +#define X86_SEG_AR_GRANULARITY  (1U << 15) /* 15, granularity */
> +#define X86_SEG_AR_SEG_UNUSABLE (1U << 16) /* 16, segment unusable */

How is this change related to rule 7.2? There are u suffixes already where
needed (and 0xf and 0x60 don't strictly need one), so there's no violation
here afaict. A mere style change to switch from u to U imo doesn't belong
here (and, as mentioned while discussing the rule, is imo hampering
readability in cases like these ones).

Jan


  parent reply	other threads:[~2023-07-06  8:04 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-05 15:26 [XEN PATCH v2 00/13] xen: fix violations of MISRA C:2012 Rule 7.2 Simone Ballarin
2023-07-05 15:26 ` [XEN PATCH v2 01/13] x86/cpufreq: " Simone Ballarin
2023-07-05 23:29   ` Stefano Stabellini
2023-07-06  7:44     ` Jan Beulich
2023-07-05 15:26 ` [XEN PATCH v2 02/13] AMD/IOMMU: " Simone Ballarin
2023-07-05 23:31   ` Stefano Stabellini
2023-07-06  7:48     ` Jan Beulich
2023-07-05 15:26 ` [XEN PATCH v2 03/13] x86/svm: " Simone Ballarin
2023-07-06  7:52   ` Jan Beulich
2023-07-05 15:26 ` [XEN PATCH v2 04/13] xen/arm: " Simone Ballarin
2023-07-05 16:27   ` Luca Fancellu
2023-07-05 16:42     ` Julien Grall
2023-07-05 15:26 ` [XEN PATCH v2 05/13] xen/device-tree: " Simone Ballarin
2023-07-05 16:28   ` Luca Fancellu
2023-07-05 23:32   ` Stefano Stabellini
2023-07-06  8:01   ` Julien Grall
2023-07-05 15:26 ` [XEN PATCH v2 06/13] xen/efi: " Simone Ballarin
2023-07-05 16:34   ` Luca Fancellu
2023-07-05 23:37   ` Stefano Stabellini
2023-07-06  7:55     ` Jan Beulich
2023-07-06 22:14       ` Stefano Stabellini
2023-07-05 15:26 ` [XEN PATCH v2 07/13] x86/vmx: " Simone Ballarin
2023-07-05 23:39   ` Stefano Stabellini
2023-07-06  8:04   ` Jan Beulich [this message]
2023-07-06 22:17     ` Stefano Stabellini
2023-07-07  6:44       ` Jan Beulich
2023-07-07  8:18     ` Simone Ballarin
2023-07-05 15:26 ` [XEN PATCH v2 08/13] xen/pci: " Simone Ballarin
2023-07-06  8:05   ` Jan Beulich
2023-07-05 15:26 ` [XEN PATCH v2 09/13] xen/public: " Simone Ballarin
2023-07-05 15:33   ` Juergen Gross
2023-07-06  7:43     ` Jan Beulich
2023-07-06  7:57       ` Juergen Gross
2023-07-06  8:43         ` Jan Beulich
2023-07-06  9:10           ` Juergen Gross
2023-07-05 23:42   ` Stefano Stabellini
2023-07-05 15:26 ` [XEN PATCH v2 10/13] x86/monitor: " Simone Ballarin
2023-07-05 15:26 ` [XEN PATCH v2 11/13] xen/vpci: " Simone Ballarin
2023-07-06  8:07   ` Jan Beulich
2023-07-05 15:26 ` [XEN PATCH v2 12/13] xen/x86: " Simone Ballarin
2023-07-06  0:11   ` Stefano Stabellini
2023-07-06  8:26   ` Jan Beulich
2023-07-06 16:08     ` Simone Ballarin
2023-07-06 16:22       ` Jan Beulich
2023-07-07  6:50         ` Simone Ballarin
2023-07-07  7:04           ` Jan Beulich
2023-07-07  8:04             ` Simone Ballarin
2023-07-07  9:46               ` Jan Beulich
2023-07-07 21:53                 ` Stefano Stabellini
2023-07-10 16:09                   ` Simone Ballarin
2023-07-06 16:22       ` Jan Beulich
2023-07-05 15:26 ` [XEN PATCH v2 13/13] xen: " Simone Ballarin
2023-07-05 16:43   ` Luca Fancellu
2023-07-05 18:42     ` Simone Ballarin
2023-07-05 19:32       ` Simone Ballarin
2023-07-06  8:28         ` Jan Beulich
2023-07-05 23:49   ` Stefano Stabellini
2023-07-06  8:34     ` Jan Beulich
2023-07-06  8:40   ` Jan Beulich

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