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From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dave Airlie <airlied@gmail.com>, Dave Airlie <airlied@redhat.com>,
	Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable.
Date: Wed, 22 Sep 2021 17:29:47 +0300	[thread overview]
Message-ID: <f42a559132a58af68916cf6e75b6a115ecb52ea3.1632320821.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1632320821.git.jani.nikula@intel.com>

From: Dave Airlie <airlied@redhat.com>

I used a macro to avoid making any really silly mistakes here.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h |  2 +-
 drivers/gpu/drm/i915/intel_pm.c | 78 +++++++++++++++++++++++----------
 2 files changed, 55 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6a6d08219526..390091b898d5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -975,7 +975,7 @@ struct drm_i915_private {
 	struct workqueue_struct *flip_wq;
 
 	/* pm private clock gating functions */
-	struct drm_i915_clock_gating_funcs clock_gating_funcs;
+	const struct drm_i915_clock_gating_funcs *clock_gating_funcs;
 
 	/* pm display functions */
 	struct drm_i915_wm_disp_funcs wm_disp;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 826216a115fd..0a5c1e3c798b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7871,7 +7871,7 @@ static void i830_init_clock_gating(struct drm_i915_private *dev_priv)
 
 void intel_init_clock_gating(struct drm_i915_private *dev_priv)
 {
-	dev_priv->clock_gating_funcs.init_clock_gating(dev_priv);
+	dev_priv->clock_gating_funcs->init_clock_gating(dev_priv);
 }
 
 void intel_suspend_hw(struct drm_i915_private *dev_priv)
@@ -7886,6 +7886,36 @@ static void nop_init_clock_gating(struct drm_i915_private *dev_priv)
 		    "No clock gating settings or workarounds applied.\n");
 }
 
+#define CG_FUNCS(platform)						\
+static const struct drm_i915_clock_gating_funcs platform##_clock_gating_funcs = { \
+	.init_clock_gating = platform##_init_clock_gating,		\
+}
+
+CG_FUNCS(adlp);
+CG_FUNCS(dg1);
+CG_FUNCS(gen12lp);
+CG_FUNCS(icl);
+CG_FUNCS(cfl);
+CG_FUNCS(skl);
+CG_FUNCS(kbl);
+CG_FUNCS(bxt);
+CG_FUNCS(glk);
+CG_FUNCS(bdw);
+CG_FUNCS(chv);
+CG_FUNCS(hsw);
+CG_FUNCS(ivb);
+CG_FUNCS(vlv);
+CG_FUNCS(gen6);
+CG_FUNCS(ilk);
+CG_FUNCS(g4x);
+CG_FUNCS(i965gm);
+CG_FUNCS(i965g);
+CG_FUNCS(gen3);
+CG_FUNCS(i85x);
+CG_FUNCS(i830);
+CG_FUNCS(nop);
+#undef CG_FUNCS
+
 /**
  * intel_init_clock_gating_hooks - setup the clock gating hooks
  * @dev_priv: device private
@@ -7898,52 +7928,52 @@ static void nop_init_clock_gating(struct drm_i915_private *dev_priv)
 void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 {
 	if (IS_ALDERLAKE_P(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = adlp_init_clock_gating;
+		dev_priv->clock_gating_funcs = &adlp_clock_gating_funcs;
 	else if (IS_DG1(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = dg1_init_clock_gating;
+		dev_priv->clock_gating_funcs = &dg1_clock_gating_funcs;
 	else if (GRAPHICS_VER(dev_priv) == 12)
-		dev_priv->clock_gating_funcs.init_clock_gating = gen12lp_init_clock_gating;
+		dev_priv->clock_gating_funcs = &gen12lp_clock_gating_funcs;
 	else if (GRAPHICS_VER(dev_priv) == 11)
-		dev_priv->clock_gating_funcs.init_clock_gating = icl_init_clock_gating;
+		dev_priv->clock_gating_funcs = &icl_clock_gating_funcs;
 	else if (IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = cfl_init_clock_gating;
+		dev_priv->clock_gating_funcs = &cfl_clock_gating_funcs;
 	else if (IS_SKYLAKE(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = skl_init_clock_gating;
+		dev_priv->clock_gating_funcs = &skl_clock_gating_funcs;
 	else if (IS_KABYLAKE(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = kbl_init_clock_gating;
+		dev_priv->clock_gating_funcs = &kbl_clock_gating_funcs;
 	else if (IS_BROXTON(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = bxt_init_clock_gating;
+		dev_priv->clock_gating_funcs = &bxt_clock_gating_funcs;
 	else if (IS_GEMINILAKE(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = glk_init_clock_gating;
+		dev_priv->clock_gating_funcs = &glk_clock_gating_funcs;
 	else if (IS_BROADWELL(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = bdw_init_clock_gating;
+		dev_priv->clock_gating_funcs = &bdw_clock_gating_funcs;
 	else if (IS_CHERRYVIEW(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = chv_init_clock_gating;
+		dev_priv->clock_gating_funcs = &chv_clock_gating_funcs;
 	else if (IS_HASWELL(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = hsw_init_clock_gating;
+		dev_priv->clock_gating_funcs = &hsw_clock_gating_funcs;
 	else if (IS_IVYBRIDGE(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = ivb_init_clock_gating;
+		dev_priv->clock_gating_funcs = &ivb_clock_gating_funcs;
 	else if (IS_VALLEYVIEW(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = vlv_init_clock_gating;
+		dev_priv->clock_gating_funcs = &vlv_clock_gating_funcs;
 	else if (GRAPHICS_VER(dev_priv) == 6)
-		dev_priv->clock_gating_funcs.init_clock_gating = gen6_init_clock_gating;
+		dev_priv->clock_gating_funcs = &gen6_clock_gating_funcs;
 	else if (GRAPHICS_VER(dev_priv) == 5)
-		dev_priv->clock_gating_funcs.init_clock_gating = ilk_init_clock_gating;
+		dev_priv->clock_gating_funcs = &ilk_clock_gating_funcs;
 	else if (IS_G4X(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = g4x_init_clock_gating;
+		dev_priv->clock_gating_funcs = &g4x_clock_gating_funcs;
 	else if (IS_I965GM(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = i965gm_init_clock_gating;
+		dev_priv->clock_gating_funcs = &i965gm_clock_gating_funcs;
 	else if (IS_I965G(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = i965g_init_clock_gating;
+		dev_priv->clock_gating_funcs = &i965g_clock_gating_funcs;
 	else if (GRAPHICS_VER(dev_priv) == 3)
-		dev_priv->clock_gating_funcs.init_clock_gating = gen3_init_clock_gating;
+		dev_priv->clock_gating_funcs = &gen3_clock_gating_funcs;
 	else if (IS_I85X(dev_priv) || IS_I865G(dev_priv))
-		dev_priv->clock_gating_funcs.init_clock_gating = i85x_init_clock_gating;
+		dev_priv->clock_gating_funcs = &i85x_clock_gating_funcs;
 	else if (GRAPHICS_VER(dev_priv) == 2)
-		dev_priv->clock_gating_funcs.init_clock_gating = i830_init_clock_gating;
+		dev_priv->clock_gating_funcs = &i830_clock_gating_funcs;
 	else {
 		MISSING_CASE(INTEL_DEVID(dev_priv));
-		dev_priv->clock_gating_funcs.init_clock_gating = nop_init_clock_gating;
+		dev_priv->clock_gating_funcs = &nop_clock_gating_funcs;
 	}
 }
 
-- 
2.30.2


  parent reply	other threads:[~2021-09-22 14:32 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-22 14:29 [Intel-gfx] [PATCH 00/24] i915/display: split and constify vtable (v6) Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 01/24] drm/i915/uncore: split the fw get function into separate vfunc Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 02/24] drm/i915/pm: drop get_fifo_size vfunc Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 03/24] drm/i915: make update_wm take a dev_priv Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 04/24] drm/i915/wm: provide wrappers around watermark vfuncs calls (v2) Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 05/24] drm/i915: add wrappers around cdclk vtable funcs Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 06/24] drm/i915/display: add intel_fdi_link_train wrapper Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 07/24] drm/i915: split clock gating init from display vtable Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 08/24] drm/i915: split watermark vfuncs " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 09/24] drm/i915: split color functions " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 10/24] drm/i915: split audio " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 11/24] drm/i915: split cdclk " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 12/24] drm/i915: split irq hotplug function " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 13/24] drm/i915: split fdi link training " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 14/24] drm/i915: split the dpll clock compute out " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 15/24] drm/i915: constify fdi link training vtable Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 16/24] drm/i915: constify hotplug function vtable Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 17/24] drm/i915: constify color " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 18/24] drm/i915: constify the audio " Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 19/24] drm/i915: constify the dpll clock vtable Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 20/24] drm/i915: constify the cdclk vtable Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 21/24] drm/i915: drop unused function ptr and comments Jani Nikula
2021-09-22 14:29 ` [Intel-gfx] [PATCH 22/24] drm/i915: constify display function vtable Jani Nikula
2021-09-22 14:29 ` Jani Nikula [this message]
2021-09-22 14:29 ` [Intel-gfx] [PATCH 24/24] drm/i915: constify display wm vtable Jani Nikula
2021-09-22 15:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915/display: split and constify vtable (rev7) Patchwork
2021-09-22 16:14 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-09-23 19:57 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915/display: split and constify vtable (rev8) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2021-09-28 22:57 [Intel-gfx] [PATCH 00/24] i915/display: split and constify vtable, again Jani Nikula
2021-09-28 22:58 ` [Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable Jani Nikula
2021-09-14 18:24 [Intel-gfx] [PATCH 00/24] i915/display: split and constify vtable (v5) Jani Nikula
2021-09-14 18:25 ` [Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable Jani Nikula

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