From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1IggiO-00037G-Ge for qemu-devel@nongnu.org; Sat, 13 Oct 2007 09:07:36 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1IggiN-000345-1e for qemu-devel@nongnu.org; Sat, 13 Oct 2007 09:07:36 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1IggiM-00033v-Ou for qemu-devel@nongnu.org; Sat, 13 Oct 2007 09:07:34 -0400 Received: from nf-out-0910.google.com ([64.233.182.189]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1IggiM-0004b1-Bn for qemu-devel@nongnu.org; Sat, 13 Oct 2007 09:07:34 -0400 Received: by nf-out-0910.google.com with SMTP id 30so1056661nfu for ; Sat, 13 Oct 2007 06:07:33 -0700 (PDT) Message-ID: Date: Sat, 13 Oct 2007 16:07:33 +0300 From: "Blue Swirl" Subject: Re: [Qemu-devel] RFC: reverse-endian softmmu memory accessors In-Reply-To: <1192279414.9976.332.camel@rapid> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1192269372.9976.305.camel@rapid> <1192279414.9976.332.camel@rapid> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On 10/13/07, J. Mayer wrote: > On Sat, 2007-10-13 at 13:47 +0300, Blue Swirl wrote: > > On 10/13/07, J. Mayer wrote: > > > The problem: > > > some CPU architectures, namely PowerPC and maybe others, offers > > > facilities to access the memory or I/O in the reverse endianness, ie > > > little-endian instead of big-endian for PowerPC, or provide instruction > > > to make memory accesses in the "reverse-endian". This is implemented as > > > a global flag on some CPU. This case is already handled by the PowerPC > > > emulation but is is far from being optimal. Some other implementations > > > allow the OS to store an "reverse-endian" flag in the TLB or the segment > > > descriptors, thus providing per-page or per-segment endianness control. > > > This is mostly used to ease driver migration from a PC platform to > > > PowerPC without taking any care of the device endianness in the driver > > > code (yes, this is bad...). > > > > Nice, this may be useful for Sparc64. It has a global CPU flag for > > endianness, individual pages can be marked as reverse endian, and > > finally there are instructions that access memory in reverse endian. > > The end result is a XOR of all these reverses. Though I don't know if > > any of these features are used at all. > > I realized that I/O accesses for reverse-endian pages were not correct > in the softmmu_template.h header. This new version fixes this. It also > remove duplicated code in the case of unaligned accesses in a > reverse-endian page. I think 64 bit access case is not handled correctly, but to solve that it would be nice to extend the current IO access system to 64 bits.