From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:49545) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmcvP-0006Ef-IE for qemu-devel@nongnu.org; Thu, 24 Jan 2019 06:12:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gmcvO-0001og-LU for qemu-devel@nongnu.org; Thu, 24 Jan 2019 06:11:59 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:45788) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gmcvO-0001mF-Es for qemu-devel@nongnu.org; Thu, 24 Jan 2019 06:11:58 -0500 Received: by mail-wr1-f65.google.com with SMTP id t6so5960917wrr.12 for ; Thu, 24 Jan 2019 03:11:58 -0800 (PST) References: <20190123212234.32068-1-stefanha@redhat.com> <20190123212234.32068-3-stefanha@redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Thu, 24 Jan 2019 12:11:55 +0100 MIME-Version: 1.0 In-Reply-To: <20190123212234.32068-3-stefanha@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 2/5] pflash: flush rom device memory region List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Stefan Hajnoczi , qemu-devel@nongnu.org Cc: Laurent Vivier , Peter Maydell , Thomas Huth , qemu-block@nongnu.org, Peter Crosthwaite , =?UTF-8?Q?Steffen_G=c3=b6rtz?= , jim@groklearning.com, Max Reitz , qemu-arm@nongnu.org, Joel Stanley , Kevin Wolf , Paolo Bonzini , jusual@mail.ru, Richard Henderson Hi Stefan, On 1/23/19 10:22 PM, Stefan Hajnoczi wrote: > pflash devices should mark the memory region dirty and invalidate TBs > after directly writing to the RAM backing the ROM device. > > Note that pflash_cfi01_get_memory() is used by several machine types to > populate ROM contents directly. Callers are untouched by this patch > because they only modify memory before the guest is started. > > Signed-off-by: Stefan Hajnoczi > --- > hw/block/pflash_cfi01.c | 5 +++++ > hw/block/pflash_cfi02.c | 8 ++++++++ > 2 files changed, 13 insertions(+) > > diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c > index bffb4c40e7..5301c11c18 100644 > --- a/hw/block/pflash_cfi01.c > +++ b/hw/block/pflash_cfi01.c > @@ -446,6 +446,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwaddr offset, > break; > } > > + memory_region_flush_rom_device(&pfl->mem, offset, width); > } > > static void pflash_write(pflash_t *pfl, hwaddr offset, > @@ -482,6 +483,8 @@ static void pflash_write(pflash_t *pfl, hwaddr offset, > if (!pfl->ro) { > memset(p + offset, 0xff, pfl->sector_len); > pflash_update(pfl, offset, pfl->sector_len); > + memory_region_flush_rom_device(&pfl->mem, offset, > + pfl->sector_len); > } else { > pfl->status |= 0x20; /* Block erase error */ > } > @@ -763,6 +766,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) > error_setg(errp, "failed to read the initial flash content"); > return; > } > + > + memory_region_flush_rom_device(&pfl->mem, 0, total_len); The device realize() is also executed before the guest is started, is this call really necessary? > } > > /* Default to devices being used at their maximum device width. This was > diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c > index 0f8b7b8c7b..d04572eca4 100644 > --- a/hw/block/pflash_cfi02.c > +++ b/hw/block/pflash_cfi02.c > @@ -378,6 +378,8 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, > pflash_update(pfl, offset, 4); > break; > } > + > + memory_region_flush_rom_device(&pfl->orig_mem, offset, width); > } > pfl->status = 0x00 | ~(value & 0x80); > /* Let's pretend write is immediate */ > @@ -426,6 +428,8 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, > if (!pfl->ro) { > memset(pfl->storage, 0xFF, pfl->chip_len); > pflash_update(pfl, 0, pfl->chip_len); > + memory_region_flush_rom_device(&pfl->orig_mem, 0, > + pfl->chip_len); > } > pfl->status = 0x00; > /* Let's wait 5 seconds before chip erase is done */ > @@ -441,6 +445,8 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, > if (!pfl->ro) { > memset(p + offset, 0xFF, pfl->sector_len); > pflash_update(pfl, offset, pfl->sector_len); > + memory_region_flush_rom_device(&pfl->orig_mem, offset, > + pfl->sector_len); > } > pfl->status = 0x00; > /* Let's wait 1/2 second before sector erase is done */ > @@ -590,6 +596,8 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) > error_setg(errp, "failed to read the initial flash content"); > return; > } > + > + memory_region_flush_rom_device(&pfl->orig_mem, 0, chip_len); Ditto. > } > > pflash_setup_mappings(pfl); >