Re: SMMU Stage 2 translation in QEMU

[Eric Auger <eric.auger@redhat.com>]

Hi Shashi,

On 9/10/21 3:32 PM, shashi.mallela@linaro.org wrote:
> So that would be the driver code running in guest OS because i see
> tables being setup by arm-smmu driver code in linux,which is similar to
> what happens with ITS(table base addresses programmed in registers by
> linux driver).
Stage2 SMMU tables are generally not used today. Only stage 1 is used,
even with VFIO (with KVM).
SMMUv3 upstream driver does not support S1+S2 (nested). It only supports
either S1 or S2. Enabling S2 can be done through VFIO driver, if you
select the VFIO_TYPE1_NESTING_IOMMU IOMMU type. This then calls IOMMU
.enable_nesting  = arm_smmu_enable_nesting which sets smmu_domain->stage
= ARM_SMMU_DOMAIN_NESTED. But the name is misleading as it actually
forces the use of S2 instead of S1.

However if you look at QEMU VFIO code, no one uses VFIO_TYPE1_NESTING_IOMMU.

Note I have worked on 2 stage integration for years, without much
success yet:
[RFC v9 00/29] vSMMUv3/pSMMUv3 2 stage VFIO integration

[PATCH v15 00/12] SMMUv3 Nested Stage Setup (IOMMU part)
[PATCH v13 00/13] SMMUv3 Nested Stage Setup (VFIO part)


Thanks

Eric
>
> On Fri, 2021-09-10 at 13:54 +0100, Peter Maydell wrote:
>> On Fri, 10 Sept 2021 at 13:39, <shashi.mallela@linaro.org> wrote:
>>> I am referring to the latter,"purely emulated QEMU with an emulated
>>> SMMU that handles accesses to emulated devices"
>> In that case, the stage 2 tables are set up by the guest
>> code (running at emulated EL2), just as they would be if
>> it were running on real hardware.
>>
>> -- PMM