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From: "Magnus Aagaard Sørensen" <mas@csselectronics.com>
To: linux-can@vger.kernel.org
Subject: mcp25xxfd driver questions
Date: Tue, 29 Sep 2020 13:07:05 +0200	[thread overview]
Message-ID: <f888df6e-d281-b9b6-93de-1a7329f011ed@csselectronics.com> (raw)

This is my first post to the list, so please inform me of any errors in 
etiquette.

I'm evaluating the MCP2518FD, and have two questions to the driver.

1. I could not find any references to the GPIOs of the chip. Is it 
correct that these are not exposed to the host system?

2. When setting the oscillator frequency outside the 
MCP25XXFD_SYSCLOCK_HZ_MIN and MCP25XXFD_SYSCLOCK_HZ_MAX range, the 
frequency is compared to the max value scaled by the max PLL value. Is 
the intention to compare with the min value? Currently, an external 
oscillator of 4 MHz and a PLL value of 10, resulting in 40 MHz, is 
treated as being too low.

diff --git a/drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c 
b/drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c
index bd2ba981ae36..9e0246c4e49f 100644
--- a/drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c
+++ b/drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c
@@ -2770,7 +2770,7 @@ static int mcp25xxfd_probe(struct spi_device *spi)
          return -ERANGE;
      }

-    if (freq <= MCP25XXFD_SYSCLOCK_HZ_MAX / MCP25XXFD_OSC_PLL_MULTIPLIER) {
+    if (freq <= MCP25XXFD_SYSCLOCK_HZ_MIN / MCP25XXFD_OSC_PLL_MULTIPLIER) {
          dev_err(&spi->dev,
              "Oscillator frequency (%u Hz) is too low and PLL is not 
supported.\n",
              freq);

Regards, Magnus.




             reply	other threads:[~2020-09-29 12:24 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-29 11:07 Magnus Aagaard Sørensen [this message]
2020-09-29 13:46 ` mcp25xxfd driver questions Marc Kleine-Budde
2020-09-30  5:32   ` Magnus Aagaard Sørensen
2020-09-30  7:27     ` Marc Kleine-Budde
2020-09-30 10:11       ` Magnus Aagaard Sørensen
2020-09-30 10:34         ` Marc Kleine-Budde

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