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[118.238.38.77]) by smtp.gmail.com with ESMTPSA id b2-20020a056a000a8200b004e1414f0bb1sm24579900pfl.135.2022.04.21.03.47.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 21 Apr 2022 03:47:45 -0700 (PDT) Message-ID: Date: Thu, 21 Apr 2022 19:47:42 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PATCH v13 2/4] mtd: spi-nor: spansion: Add support for volatile QE bit Content-Language: en-US To: Tudor.Ambarus@microchip.com, linux-mtd@lists.infradead.org Cc: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, p.yadav@ti.com, Bacem.Daassi@infineon.com, Takahiro.Kuwano@infineon.com References: <2c04068f34e4dbd25da541062f5309b1d9878c22.1650532121.git.Takahiro.Kuwano@infineon.com> From: Takahiro Kuwano In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220421_034746_899530_AF85E83B X-CRM114-Status: GOOD ( 10.81 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On 4/21/2022 7:41 PM, Tudor.Ambarus@microchip.com wrote: > On 4/21/22 12:40, tkuw584924@gmail.com wrote: [...] >> +/** >> + * cypress_nor_quad_enable_volatile() - enable Quad I/O mode in volatile >> + * register. >> + * @nor: pointer to a 'struct spi_nor' >> + * >> + * It is recommended to update volatile registers in the field application due >> + * to a risk of the non-volatile registers corruption by power interrupt. This >> + * function sets Quad Enable bit in CFR1 volatile. If users set the Quad Enable >> + * bit in the CFR1 non-volatile in advance (typically by a Flash programmer >> + * before mounting Flash on PCB), the Quad Enable bit in the CFR1 volatile is >> + * also set during Flash power-up. >> + * >> + * Return: 0 on success, -errno otherwise. >> + */ >> +static int cypress_nor_quad_enable_volatile(struct spi_nor *nor) >> +{ >> + struct spi_mem_op op; >> + u8 cfr1v_written; >> + int ret; >> + >> + op = (struct spi_mem_op) >> + CYPRESS_NOR_RD_ANY_REG_OP(3, SPINOR_REG_CYPRESS_CFR1V, > nor->addr_width is 3, isn't it? can we use nor->addr_width instead of 3, please? > No, at the time this method is called, nor->addr_width is set to 4 by spi_nor_set_addr_width(). ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/