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From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Sam Protsenko <semen.protsenko@linaro.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Rob Herring <robh+dt@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Jiri Slaby <jirislaby@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Charles Keepax <ckeepax@opensource.wolfsonmicro.com>,
	Ryu Euiyoul <ryu.real@samsung.com>,
	Tom Gall <tom.gall@linaro.org>,
	Sumit Semwal <sumit.semwal@linaro.org>,
	John Stultz <john.stultz@linaro.org>,
	Amit Pundir <amit.pundir@linaro.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Linux Samsung SOC <linux-samsung-soc@vger.kernel.org>,
	"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>
Subject: Re: [PATCH 12/12] arm64: dts: exynos: Add Exynos850 SoC support
Date: Thu, 5 Aug 2021 09:35:12 +0200	[thread overview]
Message-ID: <f9b233bb-628f-1a0f-468c-8a6c7d2b23a4@canonical.com> (raw)
In-Reply-To: <87zgtwbb6x.wl-maz@kernel.org>

On 05/08/2021 09:30, Marc Zyngier wrote:
> On Thu, 05 Aug 2021 08:17:14 +0100,
> Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote:
>>
>> On 04/08/2021 23:30, Sam Protsenko wrote:
>>>>>
>>>>> Nice catch! Actually there is an error (typo?) in SoC's TRM, saying
>>>>> that Virtual Interface Control Register starts at 0x3000 offset (from
>>>>> 0x12a00000), where it obviously should be 0x4000, that's probably
>>>>> where this dts error originates from. Btw, I'm also seeing the same
>>>>> error in exynos7.dtsi.
>>>>
>>>> What's the error exactly? The "Virtual interface control register"
>>>> offset (3rd region) is set properly to 0x4000 on Exynos7. Also one for
>>>> the Exynos5433 looks correct.
>>>>
>>>
>>> The issue is that 2nd region's size is 0x1000, but it must be 0x2000.
>>> It's defined by GIC-400 architecture, as I understand. Please look at
>>> [1], table 3-1 has very specific offsets and sizes for each functional
>>> block, and each particular SoC must adhere to that spec. So having
>>> 0x1000 for 2nd region can't be correct. And because exynos7.dtsi has
>>> GIC-400 as well, and 0x1000 is specified there for 2nd region size
>>> too, so I presume there is the same mistake there.
>>
>> I understand, the range length has indeed same mistake. However it does
>> not matter that much There are no registers pass 0x10C (so pass 0x1000).
>> This address space is not used.
> 
> I have no idea which spec you are looking at, but the GICv2
> architecture (of which GIC400 is an implementation) definitely has a
> register in the second 4kB page of the CPU interface. It contains the
> GICC_DIR register, which is used to deactivate an interrupt when
> EOIMode==1.
> 
> Linux actively uses it when started at EL2.

I was checking Exynos TRM and it seems it has one more bug... The ARM
datasheet [1] indeed mentions GICC_DIR at 0x1000. I'll add "Fixes" tag
to my fix for Exynos7.

https://developer.arm.com/documentation/ddi0471/b/programmers-model/cpu-interface-register-summary



Best regards,
Krzysztof

WARNING: multiple messages have this Message-ID
From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Sam Protsenko <semen.protsenko@linaro.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Rob Herring <robh+dt@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Jiri Slaby <jirislaby@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Charles Keepax <ckeepax@opensource.wolfsonmicro.com>,
	Ryu Euiyoul <ryu.real@samsung.com>,
	Tom Gall <tom.gall@linaro.org>,
	Sumit Semwal <sumit.semwal@linaro.org>,
	John Stultz <john.stultz@linaro.org>,
	Amit Pundir <amit.pundir@linaro.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Linux Samsung SOC <linux-samsung-soc@vger.kernel.org>,
	"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>
Subject: Re: [PATCH 12/12] arm64: dts: exynos: Add Exynos850 SoC support
Date: Thu, 5 Aug 2021 09:35:12 +0200	[thread overview]
Message-ID: <f9b233bb-628f-1a0f-468c-8a6c7d2b23a4@canonical.com> (raw)
In-Reply-To: <87zgtwbb6x.wl-maz@kernel.org>

On 05/08/2021 09:30, Marc Zyngier wrote:
> On Thu, 05 Aug 2021 08:17:14 +0100,
> Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote:
>>
>> On 04/08/2021 23:30, Sam Protsenko wrote:
>>>>>
>>>>> Nice catch! Actually there is an error (typo?) in SoC's TRM, saying
>>>>> that Virtual Interface Control Register starts at 0x3000 offset (from
>>>>> 0x12a00000), where it obviously should be 0x4000, that's probably
>>>>> where this dts error originates from. Btw, I'm also seeing the same
>>>>> error in exynos7.dtsi.
>>>>
>>>> What's the error exactly? The "Virtual interface control register"
>>>> offset (3rd region) is set properly to 0x4000 on Exynos7. Also one for
>>>> the Exynos5433 looks correct.
>>>>
>>>
>>> The issue is that 2nd region's size is 0x1000, but it must be 0x2000.
>>> It's defined by GIC-400 architecture, as I understand. Please look at
>>> [1], table 3-1 has very specific offsets and sizes for each functional
>>> block, and each particular SoC must adhere to that spec. So having
>>> 0x1000 for 2nd region can't be correct. And because exynos7.dtsi has
>>> GIC-400 as well, and 0x1000 is specified there for 2nd region size
>>> too, so I presume there is the same mistake there.
>>
>> I understand, the range length has indeed same mistake. However it does
>> not matter that much There are no registers pass 0x10C (so pass 0x1000).
>> This address space is not used.
> 
> I have no idea which spec you are looking at, but the GICv2
> architecture (of which GIC400 is an implementation) definitely has a
> register in the second 4kB page of the CPU interface. It contains the
> GICC_DIR register, which is used to deactivate an interrupt when
> EOIMode==1.
> 
> Linux actively uses it when started at EL2.

I was checking Exynos TRM and it seems it has one more bug... The ARM
datasheet [1] indeed mentions GICC_DIR at 0x1000. I'll add "Fixes" tag
to my fix for Exynos7.

https://developer.arm.com/documentation/ddi0471/b/programmers-model/cpu-interface-register-summary



Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-08-05  7:35 UTC|newest]

Thread overview: 132+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-30 14:49 [PATCH 00/12] Add minimal support for Exynos850 SoC Sam Protsenko
2021-07-30 14:49 ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 01/12] pinctrl: samsung: Fix pinctrl bank pin count Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 02/12] pinctrl: samsung: Add Exynos850 SoC specific data Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 15:22   ` Krzysztof Kozlowski
2021-07-30 15:22     ` Krzysztof Kozlowski
2021-08-02 19:24     ` Sam Protsenko
2021-08-02 19:24       ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 03/12] dt-bindings: pinctrl: samsung: Add Exynos850 doc Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 15:24   ` Krzysztof Kozlowski
2021-07-30 15:24     ` Krzysztof Kozlowski
2021-07-30 19:31     ` Sam Protsenko
2021-07-30 19:31       ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 04/12] tty: serial: samsung: Init USI to keep clocks running Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 16:31   ` Krzysztof Kozlowski
2021-07-30 16:31     ` Krzysztof Kozlowski
2021-08-02 23:06     ` Sam Protsenko
2021-08-02 23:06       ` Sam Protsenko
2021-08-03  7:37       ` Krzysztof Kozlowski
2021-08-03  7:37         ` Krzysztof Kozlowski
2021-08-03 11:41         ` Sam Protsenko
2021-08-03 11:41           ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 05/12] tty: serial: samsung: Fix driver data macros style Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 16:34   ` Krzysztof Kozlowski
2021-07-30 16:34     ` Krzysztof Kozlowski
2021-07-30 14:49 ` [PATCH 06/12] tty: serial: samsung: Add Exynos850 SoC data Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 15:05   ` Andy Shevchenko
2021-07-30 15:05     ` Andy Shevchenko
2021-07-30 16:05   ` Krzysztof Kozlowski
2021-07-30 16:05     ` Krzysztof Kozlowski
2021-07-30 23:10     ` Sam Protsenko
2021-07-30 23:10       ` Sam Protsenko
2021-07-31  7:12       ` Krzysztof Kozlowski
2021-07-31  7:12         ` Krzysztof Kozlowski
2021-07-30 14:49 ` [PATCH 07/12] dt-bindings: serial: samsung: Add Exynos850 doc Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 16:35   ` Krzysztof Kozlowski
2021-07-30 16:35     ` Krzysztof Kozlowski
2021-07-30 19:04     ` Sam Protsenko
2021-07-30 19:04       ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 08/12] MAINTAINERS: Cover Samsung clock YAML bindings Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 15:06   ` Andy Shevchenko
2021-07-30 15:06     ` Andy Shevchenko
2021-07-30 15:25     ` Krzysztof Kozlowski
2021-07-30 15:25       ` Krzysztof Kozlowski
2021-07-30 17:32       ` Sam Protsenko
2021-07-30 17:32         ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 09/12] dt-bindings: clock: Add bindings for Exynos850 clock controller Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 15:43   ` Krzysztof Kozlowski
2021-07-30 15:43     ` Krzysztof Kozlowski
2021-08-03 11:55     ` Sam Protsenko
2021-08-03 11:55       ` Sam Protsenko
2021-07-30 22:28   ` Rob Herring
2021-07-30 22:28     ` Rob Herring
2021-07-30 14:49 ` [PATCH 10/12] clk: samsung: Add Exynos850 clock driver stub Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 15:11   ` Andy Shevchenko
2021-07-30 15:11     ` Andy Shevchenko
2021-07-30 17:24     ` Sam Protsenko
2021-07-30 17:24       ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 11/12] dt-bindings: interrupt-controller: Add IRQ constants for Exynos850 Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-31  8:45   ` Krzysztof Kozlowski
2021-07-31  8:45     ` Krzysztof Kozlowski
2021-08-03 12:58     ` Sam Protsenko
2021-08-03 12:58       ` Sam Protsenko
2021-07-30 14:49 ` [PATCH 12/12] arm64: dts: exynos: Add Exynos850 SoC support Sam Protsenko
2021-07-30 14:49   ` Sam Protsenko
2021-07-30 16:50   ` Marc Zyngier
2021-07-30 16:50     ` Marc Zyngier
2021-08-04 14:39     ` Sam Protsenko
2021-08-04 14:39       ` Sam Protsenko
2021-08-04 15:01       ` Marc Zyngier
2021-08-04 15:01         ` Marc Zyngier
2021-08-04 18:37         ` Sam Protsenko
2021-08-04 18:37           ` Sam Protsenko
2021-08-05  7:39           ` Marc Zyngier
2021-08-05  7:39             ` Marc Zyngier
2021-08-05 15:30             ` Sam Protsenko
2021-08-05 15:30               ` Sam Protsenko
2021-08-05 15:50               ` Marc Zyngier
2021-08-05 15:50                 ` Marc Zyngier
2021-08-04 18:36       ` Krzysztof Kozlowski
2021-08-04 18:36         ` Krzysztof Kozlowski
2021-08-04 21:30         ` Sam Protsenko
2021-08-04 21:30           ` Sam Protsenko
2021-08-05  7:17           ` Krzysztof Kozlowski
2021-08-05  7:17             ` Krzysztof Kozlowski
2021-08-05  7:30             ` Marc Zyngier
2021-08-05  7:30               ` Marc Zyngier
2021-08-05  7:35               ` Krzysztof Kozlowski [this message]
2021-08-05  7:35                 ` Krzysztof Kozlowski
2021-07-31  9:03   ` Krzysztof Kozlowski
2021-07-31  9:03     ` Krzysztof Kozlowski
2021-08-05 23:06     ` Sam Protsenko
2021-08-05 23:06       ` Sam Protsenko
2021-08-06  7:48       ` Krzysztof Kozlowski
2021-08-06  7:48         ` Krzysztof Kozlowski
2021-08-06 12:07         ` Sam Protsenko
2021-08-06 12:07           ` Sam Protsenko
2021-08-06 12:32           ` Krzysztof Kozlowski
2021-08-06 12:32             ` Krzysztof Kozlowski
2021-08-06 12:48             ` Krzysztof Kozlowski
2021-08-06 12:48               ` Krzysztof Kozlowski
2021-08-06 16:57               ` Sam Protsenko
2021-08-06 16:57                 ` Sam Protsenko
2021-08-06 20:32             ` Paweł Chmiel
2021-08-06 20:32               ` Paweł Chmiel
2021-09-06 15:16               ` Sam Protsenko
2021-09-06 15:16                 ` Sam Protsenko
2021-07-30 15:18 ` [PATCH 00/12] Add minimal support for Exynos850 SoC Krzysztof Kozlowski
2021-07-30 15:18   ` Krzysztof Kozlowski
2021-07-30 17:21   ` Krzysztof Kozlowski
2021-07-30 17:21     ` Krzysztof Kozlowski
2021-07-30 19:02     ` Sam Protsenko
2021-07-30 19:02       ` Sam Protsenko
2021-07-31  7:29       ` Krzysztof Kozlowski
2021-07-31  7:29         ` Krzysztof Kozlowski
2021-07-31  8:12         ` Krzysztof Kozlowski
2021-07-31  8:12           ` Krzysztof Kozlowski
2021-08-02 23:27           ` Sam Protsenko
2021-08-02 23:27             ` Sam Protsenko
2021-08-03  7:41             ` Krzysztof Kozlowski
2021-08-03  7:41               ` Krzysztof Kozlowski

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