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From: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>
To: xen-devel@lists.xenproject.org
Cc: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"George Dunlap" <george.dunlap@citrix.com>,
	"Julien Grall" <julien@xen.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Wei Liu" <wl@xen.org>
Subject: [PATCH v4 02/11] drivers/char: reset XHCI ports when initializing dbc
Date: Sat, 13 Aug 2022 03:38:52 +0200	[thread overview]
Message-ID: <f9b47a78968e06f5af2930d99e5dc558fdc131f2.1660354597.git-series.marmarek@invisiblethingslab.com> (raw)
In-Reply-To: <cover.05bda81c2f5ff91948f96e397b6836bcede71ef8.1660354597.git-series.marmarek@invisiblethingslab.com>

Reset ports, to force host system to re-enumerate devices. Otheriwse it
will require the cable to be re-plugged, or will wait in the
"configuring" state indefinitely.

Trick and code copied from Linux:
drivers/usb/early/xhci-dbc.c:xdbc_start()->xdbc_reset_debug_port()

Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
---
Changes in v3:
- adjust for renamed driver
- use readl() etc for MMIO
- simplify xcap lookup
- drop acked-by
Changes in v2:
- use uint32_t instead of u32
- code style
---
 xen/drivers/char/xhci-dbc.c | 75 ++++++++++++++++++++++++++++++++++++++-
 1 file changed, 75 insertions(+)

diff --git a/xen/drivers/char/xhci-dbc.c b/xen/drivers/char/xhci-dbc.c
index a16c81b9e71c..8c9dfa6cfcc0 100644
--- a/xen/drivers/char/xhci-dbc.c
+++ b/xen/drivers/char/xhci-dbc.c
@@ -66,6 +66,10 @@
     ((1UL << DBC_PSC_CSC) | (1UL << DBC_PSC_PRC) | (1UL << DBC_PSC_PLC) |      \
      (1UL << DBC_PSC_CEC))
 
+#define XHC_EXT_PORT_MAJOR(x)  (((x) >> 24) & 0xff)
+#define PORT_RESET             (1 << 4)
+#define PORT_CONNECT           (1 << 0)
+
 #define dbc_debug(...) printk("dbc debug: " __VA_ARGS__)
 #define dbc_alert(...) printk("dbc alert: " __VA_ARGS__)
 #define dbc_error(...) printk("dbc error: " __VA_ARGS__)
@@ -666,6 +670,73 @@ static void dbc_init_strings(struct dbc *dbc, uint32_t *info)
                            &dbc->dbc_ctx->serial_size);
 }
 
+static void dbc_do_reset_debug_port(struct dbc *dbc,
+                                    unsigned int id, unsigned int count)
+{
+    uint32_t __iomem *ops_reg;
+    uint32_t __iomem *portsc;
+    uint32_t val, cap_length;
+    unsigned int i;
+
+    cap_length = readl(dbc->xhc_mmio) & 0xff;
+    ops_reg = dbc->xhc_mmio + cap_length;
+
+    id--;
+    for ( i = id; i < (id + count); i++ )
+    {
+        portsc = ops_reg + 0x100 + i * 0x4;
+        val = readl(portsc);
+        if ( !(val & PORT_CONNECT) )
+            writel(val | PORT_RESET, portsc);
+    }
+}
+
+static void dbc_reset_debug_port(struct dbc *dbc)
+{
+    uint32_t val, port_offset, port_count;
+    uint32_t __iomem *xcap;
+    uint32_t xcap_val;
+    uint32_t next;
+    uint32_t id;
+    uint8_t __iomem *mmio = (uint8_t *)dbc->xhc_mmio;
+    uint32_t __iomem *hccp1 = (uint32_t *)(mmio + 0x10);
+    const uint32_t PROTOCOL_ID = 0x2;
+    int ttl = 48;
+
+    xcap = (uint32_t *)dbc->xhc_mmio;
+    /*
+     * This is initially an offset to the first capability. All the offsets
+     * (both in HCCP1 and then next capability pointer are dword-based.
+     */
+    next = (readl(hccp1) & 0xFFFF0000) >> 16;
+
+    /*
+     * Look for "supported protocol" capability, major revision 3.
+     * There may be multiple of them.
+     */
+    while ( next && ttl-- )
+    {
+        xcap += next;
+        xcap_val = readl(xcap);
+        id = xcap_val & 0xFF;
+        next = (xcap_val & 0xFF00) >> 8;
+
+        if ( id != PROTOCOL_ID )
+            continue;
+
+        if ( XHC_EXT_PORT_MAJOR(xcap_val) != 0x3 )
+            continue;
+
+        /* extract ports offset and count from the capability structure */
+        val = readl(xcap + 2);
+        port_offset = val & 0xff;
+        port_count = (val >> 8) & 0xff;
+
+        /* and reset them all */
+        dbc_do_reset_debug_port(dbc, port_offset, port_count);
+    }
+}
+
 static void dbc_enable_dbc(struct dbc *dbc)
 {
     struct dbc_reg *reg = dbc->dbc_reg;
@@ -677,6 +748,10 @@ static void dbc_enable_dbc(struct dbc *dbc)
     while ( (readl(&reg->ctrl) & (1U << DBC_CTRL_DCE)) == 0 )
         cpu_relax();
 
+    /* reset ports on initial open, to force re-enumerating by the host */
+    if ( !dbc->open )
+        dbc_reset_debug_port(dbc);
+
     wmb();
     writel(readl(&reg->portsc) | (1U << DBC_PSC_PED), &reg->portsc);
     wmb();
-- 
git-series 0.9.1


  parent reply	other threads:[~2022-08-13  1:39 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-13  1:38 [PATCH v4 00/11] Add Xue - console over USB 3 Debug Capability Marek Marczykowski-Górecki
2022-08-13  1:38 ` [PATCH v4 01/11] drivers/char: Add support for USB3 DbC debugger Marek Marczykowski-Górecki
2022-08-15 12:58   ` Jan Beulich
2022-08-13  1:38 ` Marek Marczykowski-Górecki [this message]
2022-08-13  1:38 ` [PATCH v4 03/11] drivers/char: add support for selecting specific xhci Marek Marczykowski-Górecki
2022-08-13  1:38 ` [PATCH v4 04/11] drivers/char: make serial_parse_handle take const argument Marek Marczykowski-Górecki
2022-08-15 13:19   ` Jan Beulich
2022-08-13  1:38 ` [PATCH v4 05/11] console: support multiple serial console simultaneously Marek Marczykowski-Górecki
2022-08-13  1:38 ` [PATCH v4 06/11] IOMMU: add common API for device reserved memory Marek Marczykowski-Górecki
2022-08-15 13:25   ` Jan Beulich
2022-08-13  1:38 ` [PATCH v4 07/11] IOMMU/VT-d: wire common device reserved memory API Marek Marczykowski-Górecki
2022-08-13  1:38 ` [PATCH v4 08/11] IOMMU/AMD: " Marek Marczykowski-Górecki
2022-08-13  1:38 ` [PATCH v4 09/11] drivers/char: mark DMA buffers as reserved for the XHCI Marek Marczykowski-Górecki
2022-08-17 14:41   ` Jan Beulich
2022-08-13  1:39 ` [PATCH v4 10/11] drivers/char: add RX support to the XHCI driver Marek Marczykowski-Górecki
2022-08-17 14:42   ` Jan Beulich
2022-08-13  1:39 ` [PATCH v4 11/11] drivers/char: allow driving the rest of XHCI by a domain while Xen uses DbC Marek Marczykowski-Górecki
2022-08-17 15:08   ` Jan Beulich
2022-08-17 15:27     ` Marek Marczykowski-Górecki
2022-08-17 15:37       ` Jan Beulich

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