From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 29 Nov 2018 21:18:39 +0100 Subject: [U-Boot] [PULL] u-boot-socfpga/master Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de The following changes since commit 67cf22cbdef8c62ffa28b4caf935825fe410c68d: Merge branch 'master' of git://git.denx.de/u-boot-usb (2018-11-27 14:01:45 -0500) are available in the Git repository at: git://git.denx.de/u-boot-socfpga.git master for you to fetch changes up to 30bade20a67a8205e10d006d8e1ac66552c1b137: arm: socfpga: fix SPL booting from fpga OnChip RAM (2018-11-29 12:45:15 +0100) ---------------------------------------------------------------- Simon Goldschmidt (6): arm: socfpga: make config structs const gpio: dwapb_gpio: fix binding without bank-name property spi: cadence_qspi: use "cdns,qspi-nor" as compatible dts: arm: socfpga: merge gen5 devicetrees from linux arm: socfpga: make socfpga_socrates_defconfig boot from QSPI arm: socfpga: fix SPL booting from fpga OnChip RAM arch/arm/dts/keystone-k2g.dtsi | 2 +- arch/arm/dts/socfpga.dtsi | 404 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------- arch/arm/dts/socfpga_arria10.dtsi | 2 +- arch/arm/dts/socfpga_arria5.dtsi | 11 ++-- arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi | 56 +++++++++++++++++++ arch/arm/dts/socfpga_arria5_socdk.dts | 97 +++++++++++++++++++++++--------- arch/arm/dts/socfpga_cyclone5.dtsi | 9 +-- arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts | 17 +++++- arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi | 46 +++++++++++++++ arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 69 ++++++++++++++--------- arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 16 ++++++ arch/arm/dts/socfpga_cyclone5_de1_soc.dts | 16 ++++++ arch/arm/dts/socfpga_cyclone5_is1.dts | 8 +++ arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi | 72 ++++++++++++++++++++++++ arch/arm/dts/socfpga_cyclone5_socdk.dts | 88 ++++++++++++++++++++++------- arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi | 56 +++++++++++++++++++ arch/arm/dts/socfpga_cyclone5_sockit.dts | 149 +++++++++++++++++++++++++++++++++++++++---------- arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi | 60 ++++++++++++++++++++ arch/arm/dts/socfpga_cyclone5_socrates.dts | 87 +++++++++++++++-------------- arch/arm/dts/socfpga_cyclone5_sr1500.dts | 12 ++++ arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi | 60 ++++++++++++++++++++ arch/arm/dts/socfpga_cyclone5_vining_fpga.dts | 222 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------- arch/arm/dts/stv0991.dts | 2 +- arch/arm/mach-socfpga/include/mach/base_addr_ac5.h | 1 + arch/arm/mach-socfpga/include/mach/misc.h | 9 +++ arch/arm/mach-socfpga/misc_gen5.c | 9 ++- arch/arm/mach-socfpga/spl_gen5.c | 10 +++- arch/arm/mach-socfpga/wrap_sdram_config.c | 4 +- doc/device-tree-bindings/spi/spi-cadence.txt | 2 +- drivers/gpio/dwapb_gpio.c | 7 +++ drivers/spi/cadence_qspi.c | 2 +- 31 files changed, 1264 insertions(+), 341 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi