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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v8 04/28] spi: spi-mem: add spi_mem_dtr_supports_op()
Date: Mon, 5 Apr 2021 09:16:32 -0400	[thread overview]
Message-ID: <f9e7907b-8f19-45c4-2b9a-180a9baf16e5@gmail.com> (raw)
In-Reply-To: <20210405074032.uhuoeegby3f6zn4d@ti.com>

On 4/5/21 3:40 AM, Pratyush Yadav wrote:
> On 02/04/21 06:31PM, Sean Anderson wrote:
>> On 4/1/21 3:31 PM, Pratyush Yadav wrote:
>>> spi_mem_default_supports_op() rejects DTR ops by default to ensure that
>>> the controller drivers that haven't been updated with DTR support
>>> continue to reject them. It also makes sure that controllers that don't
>>> support DTR mode at all (which is most of them at the moment) also
>>> reject them.
>>>
>>> This means that controller drivers that want to support DTR mode can't
>>> use spi_mem_default_supports_op(). Driver authors have to roll their own
>>> supports_op() function and mimic the buswidth checks. See
>>> spi-cadence-quadspi.c for example. Or even worse, driver authors might
>>> skip it completely or get it wrong.
>>>
>>> Add spi_mem_dtr_supports_op(). It provides a basic sanity check for DTR
>>> ops and performs the buswidth requirement check. Move the logic for
>>> checking buswidth in spi_mem_default_supports_op() to a separate
>>> function so the logic is not repeated twice.
>>>
>>> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
>>> ---
>>>    drivers/spi/spi-mem.c | 22 +++++++++++++++++++---
>>>    include/spi-mem.h     |  2 ++
>>>    2 files changed, 21 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
>>> index 541cd0e5a7..be1737a2c6 100644
>>> --- a/drivers/spi/spi-mem.c
>>> +++ b/drivers/spi/spi-mem.c
>>> @@ -145,8 +145,8 @@ static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx)
>>>    	return -ENOTSUPP;
>>>    }
>>> -bool spi_mem_default_supports_op(struct spi_slave *slave,
>>> -				 const struct spi_mem_op *op)
>>> +static bool spi_mem_check_buswidth(struct spi_slave *slave,
>>> +				   const struct spi_mem_op *op)
>>>    {
>>>    	if (spi_check_buswidth_req(slave, op->cmd.buswidth, true))
>>>    		return false;
>>> @@ -164,13 +164,29 @@ bool spi_mem_default_supports_op(struct spi_slave *slave,
>>>    				   op->data.dir == SPI_MEM_DATA_OUT))
>>>    		return false;
>>> +	return true;
>>> +}
>>> +
>>> +bool spi_mem_dtr_supports_op(struct spi_slave *slave,
>>> +			     const struct spi_mem_op *op)
>>> +{
>>> +	if (op->cmd.nbytes != 2)
>>> +		return false;
>>
>> Why does the command bytes need to be 2?
> 
> They need to be 2 if the command buswidth is 8 because otherwise the
> command phase will only take up half a cycle. This should have been if
> (op->cmd.buswidth == 8 && op->cmd.nbytes != 2).

Perhaps the most correct then is

int width = cmd.dtr ? cmd.buswidth * 2 : cmd.buswidth;
if (cmd.nbytes % width) { ... }

>>
>> --Sean
>>
>>> +
>>> +	return spi_mem_check_buswidth(slave, op);
>>> +}
>>> +EXPORT_SYMBOL_GPL(spi_mem_dtr_supports_op);
>>> +
>>> +bool spi_mem_default_supports_op(struct spi_slave *slave,
>>> +				 const struct spi_mem_op *op)
>>> +{
>>>    	if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
>>>    		return false;
>>>    	if (op->cmd.nbytes != 1)
>>>    		return false;>   -	return true;
>>> +	return spi_mem_check_buswidth(slave, op);
>>>    }
>>>    EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
>>> diff --git a/include/spi-mem.h b/include/spi-mem.h
>>> index dc53b517c1..37a9128c5b 100644
>>> --- a/include/spi-mem.h
>>> +++ b/include/spi-mem.h
>>> @@ -249,6 +249,8 @@ spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
>>>    int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op);
>>>    bool spi_mem_supports_op(struct spi_slave *slave, const struct spi_mem_op *op);
>>> +bool spi_mem_dtr_supports_op(struct spi_slave *slave,
>>> +			     const struct spi_mem_op *op);
>>>    bool spi_mem_default_supports_op(struct spi_slave *slave,
>>>    				 const struct spi_mem_op *op);
>>>
>>
> 

  reply	other threads:[~2021-04-05 13:16 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-01 19:31 [PATCH v8 00/28] mtd: spi-nor-core: add xSPI Octal DTR support Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 01/28] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2021-04-02 22:21   ` Sean Anderson
2021-04-05  8:25     ` Pratyush Yadav
2021-04-05 11:47       ` Tom Rini
2021-04-05 13:12         ` Sean Anderson
2021-04-05 13:57           ` Pratyush Yadav
2021-04-05 14:58             ` Tom Rini
2021-04-01 19:31 ` [PATCH v8 02/28] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2021-04-02 22:29   ` Sean Anderson
2021-04-05  8:18     ` Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 03/28] spi: spi-mem: export spi_mem_default_supports_op() Pratyush Yadav
2021-04-02 22:09   ` Sean Anderson
2021-04-01 19:31 ` [PATCH v8 04/28] spi: spi-mem: add spi_mem_dtr_supports_op() Pratyush Yadav
2021-04-02 22:31   ` Sean Anderson
2021-04-05  7:40     ` Pratyush Yadav
2021-04-05 13:16       ` Sean Anderson [this message]
2021-04-01 19:31 ` [PATCH v8 05/28] spi: cadence-qspi: Do not calibrate when device tree sets read delay Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 06/28] spi: cadence-qspi: Add a small delay before indirect writes Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 07/28] spi: cadence-qspi: Add support for octal DTR flashes Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 08/28] arm: mvebu: x530: Use tiny SPI NOR Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 09/28] mtd: spi-nor-core: Fix address width on flash chips > 16MB Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 10/28] mtd: spi-nor-core: Add a ->setup() hook Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 11/28] mtd: spi-nor-core: Move SFDP related declarations to top Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 12/28] mtd: spi-nor-core: Introduce flash-specific fixup hooks Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 13/28] mtd: spi-nor-core: Rework hwcaps selection Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 14/28] mtd: spi-nor-core: Do not set data direction when there is no data Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 15/28] mtd: spi-nor-core: Add support for DTR protocol Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 16/28] mtd: spi-nor-core: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 17/28] mtd: spi-nor-core: Get command opcode extension type from BFPT Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 18/28] mtd: spi-nor-core: Parse xSPI Profile 1.0 table Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 19/28] mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 20/28] mtd: spi-nor-core: Enable octal DTR mode when possible Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 21/28] mtd: spi-nor-core: Do not make invalid quad enable fatal Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 22/28] mtd: spi-nor-core: Detect Soft Reset sequence support from BFPT Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 23/28] mtd: spi-nor-core: Perform a Soft Reset on shutdown Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 24/28] mtd: spi-nor-core: Perform a Soft Reset on boot Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 25/28] mtd: spi-nor-core: allow truncated erases Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 26/28] mtd: spi-nor-core: Add non-uniform erase for Spansion/Cypress Pratyush Yadav
2021-04-06  1:48   ` Takahiro Kuwano
2021-04-06 10:46     ` Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 27/28] mtd: spi-nor-core: Add support for Cypress Semper flash Pratyush Yadav
2021-04-01 19:31 ` [PATCH v8 28/28] mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode Pratyush Yadav
2021-04-02 22:28 ` [PATCH v8 00/28] mtd: spi-nor-core: add xSPI Octal DTR support Sean Anderson
2021-04-05  7:43   ` Pratyush Yadav
2021-04-05 13:17     ` Sean Anderson

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