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* How to re-inject a debug exception correctly?
@ 2022-07-15  8:53 Stephan Tobies
  2022-07-15 13:15 ` Marc Zyngier
  0 siblings, 1 reply; 2+ messages in thread
From: Stephan Tobies @ 2022-07-15  8:53 UTC (permalink / raw)
  To: kvmarm


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Hello!

The comment for kvm_handle_guest_debug states that it is up to the userspace to re-inject debug exceptions for the guest when they are not “used” by userspace.

On x86, this is a fairly simple process that uses KVM_SET_VCPU_EVENTS. Does this work similarly on ARM? Is there some sample code or description which steps are necessary for that re-injection? QEMU uses its generic interrupt machinery, which makes it hard to determine what are the necessary steps to re-inject the exception into the guest.

Thanks for your assistance!

Stephan
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* Re: How to re-inject a debug exception correctly?
  2022-07-15  8:53 How to re-inject a debug exception correctly? Stephan Tobies
@ 2022-07-15 13:15 ` Marc Zyngier
  0 siblings, 0 replies; 2+ messages in thread
From: Marc Zyngier @ 2022-07-15 13:15 UTC (permalink / raw)
  To: Stephan Tobies; +Cc: kvmarm

On 2022-07-15 09:53, Stephan Tobies wrote:
> Hello!
> 
> The comment for kvm_handle_guest_debug states that it is up to the
> userspace to re-inject debug exceptions for the guest when they are
> not “used” by userspace.
> 
> On x86, this is a fairly simple process that uses KVM_SET_VCPU_EVENTS.
> Does this work similarly on ARM?

Not really. KVM_SET_VCPU_EVENT is only used to inject exceptions
such as an external data abort, or an SError interrupt.

> Is there some sample code or
> description which steps are necessary for that re-injection? QEMU uses
> its generic interrupt machinery, which makes it hard to determine what
> are the necessary steps to re-inject the exception into the guest.

You need to do whatever the architecture requires you to perform:
- populate ESR, FAR
- Inject the exception itself (update SPSR, ELR, PSTATE, PC)
   for a synchronous exception.

Effectively, userspace has to implement part of the exception
delivery that would normally be done by the CPU itself if
userspace wasn't in the way.

For the details, please look at the AArch64.Abort() pseudocode
in the ARM ARM (DDI 0487G.b, J1.1.2 "aarch64/exceptions"), which
is the reference.

HTH,

         M.
-- 
Jazz is not dead. It just smells funny...
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