Re: [PATCH 3/8] tcg/loongarch64: Update tcg-insn-defs.c.inc

[Richard Henderson <richard.henderson@linaro.org>]

On 12/14/22 23:50, Philippe Mathieu-Daudé wrote:
> On 6/12/22 05:40, Richard Henderson wrote:
>> Regenerate with ADDU16I included.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   tcg/loongarch64/tcg-insn-defs.c.inc | 10 +++++++++-
>>   1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/tcg/loongarch64/tcg-insn-defs.c.inc b/tcg/loongarch64/tcg-insn-defs.c.inc
>> index d162571856..c3c8669b4b 100644
>> --- a/tcg/loongarch64/tcg-insn-defs.c.inc
>> +++ b/tcg/loongarch64/tcg-insn-defs.c.inc
>> @@ -4,7 +4,7 @@
>>    *
>>    * This file is auto-generated by genqemutcgdefs from
>>    * https://github.com/loongson-community/loongarch-opcodes,
>> - * from commit 961f0c60f5b63e574d785995600c71ad5413fdc4.
> 
> Odd, addu16i.d is present since 3d057a6, so was already in 961f0c6.

It wasn't marked "qemu", so the generator didn't emit ...

>> @@ -74,6 +74,7 @@ typedef enum {
>>       OPC_ANDI = 0x03400000,
>>       OPC_ORI = 0x03800000,
>>       OPC_XORI = 0x03c00000,
>> +    OPC_ADDU16I_D = 0x10000000,
>>       OPC_LU12I_W = 0x14000000,
>>       OPC_CU32I_D = 0x16000000,
>>       OPC_PCADDU2I = 0x18000000,
>> @@ -710,6 +711,13 @@ tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
>>       tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12));
>>   }
>> +/* Emits the `addu16i.d d, j, sk16` instruction.  */
>> +static void __attribute__((unused))
>> +tcg_out_opc_addu16i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
>> +{
>> +    tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16));
>> +}

... all this.

r~