From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D6F8C43381 for ; Mon, 25 Mar 2019 02:09:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DFA632075C for ; Mon, 25 Mar 2019 02:08:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729321AbfCYCI6 (ORCPT ); Sun, 24 Mar 2019 22:08:58 -0400 Received: from mga04.intel.com ([192.55.52.120]:36878 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729154AbfCYCI5 (ORCPT ); Sun, 24 Mar 2019 22:08:57 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Mar 2019 19:08:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,256,1549958400"; d="scan'208";a="129847836" Received: from allen-box.sh.intel.com (HELO [10.239.159.136]) ([10.239.159.136]) by orsmga006.jf.intel.com with ESMTP; 24 Mar 2019 19:08:55 -0700 Cc: baolu.lu@linux.intel.com, iommu@lists.linux-foundation.org, Tom Murphy , Dmitry Safonov , Jacob Pan , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 3/7] iommu/vt-d: Expose ISA direct mapping region via iommu_get_resv_regions To: James Sewart References: <0F0C82BE-86E5-4BAC-938C-6F7629E18D27@arista.com> <83B82113-8AE5-4B0C-A079-F389520525BD@arista.com> From: Lu Baolu Message-ID: Date: Mon, 25 Mar 2019 10:03:18 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi James, On 3/22/19 5:57 PM, James Sewart wrote: > Hey Lu, > >> On 15 Mar 2019, at 02:19, Lu Baolu wrote: >> >> Hi James, >> >> On 3/14/19 7:58 PM, James Sewart wrote: >>> To support mapping ISA region via iommu_group_create_direct_mappings, >>> make sure its exposed by iommu_get_resv_regions. This allows >>> deduplication of reserved region mappings >>> Signed-off-by: James Sewart >>> --- >>> drivers/iommu/intel-iommu.c | 42 +++++++++++++++++++++++++++++-------- >>> 1 file changed, 33 insertions(+), 9 deletions(-) >>> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c >>> index 8e0a4e2ff77f..2e00e8708f06 100644 >>> --- a/drivers/iommu/intel-iommu.c >>> +++ b/drivers/iommu/intel-iommu.c >>> @@ -337,6 +337,8 @@ static LIST_HEAD(dmar_rmrr_units); >>> #define for_each_rmrr_units(rmrr) \ >>> list_for_each_entry(rmrr, &dmar_rmrr_units, list) >>> +static struct iommu_resv_region *isa_resv_region; >>> + >>> /* bitmap for indexing intel_iommus */ >>> static int g_num_of_iommus; >>> @@ -2780,26 +2782,34 @@ static inline int iommu_prepare_rmrr_dev(struct dmar_rmrr_unit *rmrr, >>> rmrr->end_address); >>> } >>> +static inline struct iommu_resv_region *iommu_get_isa_resv_region(void) >>> +{ >>> + if (!isa_resv_region) >>> + isa_resv_region = iommu_alloc_resv_region(0, >>> + 16*1024*1024, >>> + 0, IOMMU_RESV_DIRECT); >>> + >>> + return isa_resv_region; >>> +} >>> + >>> #ifdef CONFIG_INTEL_IOMMU_FLOPPY_WA >>> -static inline void iommu_prepare_isa(void) >>> +static inline void iommu_prepare_isa(struct pci_dev *pdev) >>> { >>> - struct pci_dev *pdev; >>> int ret; >>> + struct iommu_resv_region *reg = iommu_get_isa_resv_region(); >>> - pdev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); >>> - if (!pdev) >>> + if (!reg) >>> return; >>> pr_info("Prepare 0-16MiB unity mapping for LPC\n"); >>> - ret = iommu_prepare_identity_map(&pdev->dev, 0, 16*1024*1024 - 1); >>> + ret = iommu_prepare_identity_map(&pdev->dev, reg->start, >>> + reg->start + reg->length - 1); >>> if (ret) >>> pr_err("Failed to create 0-16MiB identity map - floppy might not work\n"); >>> - >>> - pci_dev_put(pdev); >>> } >>> #else >>> -static inline void iommu_prepare_isa(void) >>> +static inline void iommu_prepare_isa(struct pci_dev *pdev) >>> { >>> return; >>> } >>> @@ -3289,6 +3299,7 @@ static int __init init_dmars(void) >>> struct dmar_rmrr_unit *rmrr; >>> bool copied_tables = false; >>> struct device *dev; >>> + struct pci_dev *pdev; >>> struct intel_iommu *iommu; >>> int i, ret; >>> @@ -3469,7 +3480,11 @@ static int __init init_dmars(void) >>> } >>> } >>> - iommu_prepare_isa(); >>> + pdev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); >>> + if (pdev) { >>> + iommu_prepare_isa(pdev); >>> + pci_dev_put(pdev); >>> + } >>> domains_done: >>> @@ -5266,6 +5281,7 @@ static void intel_iommu_get_resv_regions(struct device *device, >>> struct iommu_resv_region *reg; >>> struct dmar_rmrr_unit *rmrr; >>> struct device *i_dev; >>> + struct pci_dev *pdev; >>> int i; >>> rcu_read_lock(); >>> @@ -5280,6 +5296,14 @@ static void intel_iommu_get_resv_regions(struct device *device, >>> } >>> rcu_read_unlock(); >>> + if (dev_is_pci(device)) { >>> + pdev = to_pci_dev(device); >>> + if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) { >>> + reg = iommu_get_isa_resv_region(); >>> + list_add_tail(®->list, head); >>> + } >>> + } >>> + >> >> Just wondering why not just >> >> +#ifdef CONFIG_INTEL_IOMMU_FLOPPY_WA >> + if (dev_is_pci(device)) { >> + pdev = to_pci_dev(device); >> + if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) { >> + reg = iommu_alloc_resv_region(0, >> + 16*1024*1024, >> + 0, IOMMU_RESV_DIRECT); >> + if (reg) >> + list_add_tail(®->list, head); >> + } >> + } >> +#endif >> >> and, remove all other related code? > > At this point in the patchset if we remove iommu_prepare_isa then the ISA > region won’t be mapped to the device. Only once the dma domain is allocable > will the reserved regions be mapped by iommu_group_create_direct_mappings. Yes. So if we put the allocation code here, it won't impact anything and will take effect as soon as the dma domain is allocatable. > > Theres an issue that if we choose to alloc a new resv_region with type > IOMMU_RESV_DIRECT, we will need to refactor intel_iommu_put_resv_regions > to free this entry type which means refactoring the rmrr regions in > get_resv_regions. Should this work be in this patchset? Do you mean the rmrr regions are not allocated in get_resv_regions, but are freed in put_resv_regions? I think we should fix this in this patch set since this might impact the device passthrough if we don't do it. Best regards, Lu Baolu From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lu Baolu Subject: Re: [PATCH v2 3/7] iommu/vt-d: Expose ISA direct mapping region via iommu_get_resv_regions Date: Mon, 25 Mar 2019 10:03:18 +0800 Message-ID: References: <0F0C82BE-86E5-4BAC-938C-6F7629E18D27@arista.com> <83B82113-8AE5-4B0C-A079-F389520525BD@arista.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: James Sewart Cc: Dmitry Safonov , Tom Murphy , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org List-Id: iommu@lists.linux-foundation.org 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