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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id in24sm12331067pjb.54.2021.06.14.07.49.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 14 Jun 2021 07:49:12 -0700 (PDT) Subject: Re: [PATCH] accel/tcg: Probe the proper permissions for atomic ops To: =?UTF-8?Q?Alex_Benn=c3=a9e?= References: <20210613002505.898859-1-richard.henderson@linaro.org> <87lf7ck9vp.fsf@linaro.org> From: Richard Henderson Message-ID: Date: Mon, 14 Jun 2021 07:49:10 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <87lf7ck9vp.fsf@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.489, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 6/14/21 3:18 AM, Alex Bennée wrote: > > Richard Henderson writes: > >> We had a single ATOMIC_MMU_LOOKUP macro that probed for >> read+write on all atomic ops. This is incorrect for >> plain atomic load and atomic store. >> >> For user-only, we rely on the host page permissions. >> >> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/390 >> Signed-off-by: Richard Henderson >> --- > >> >> -/* Probe for a read-modify-write atomic operation. Do not allow unaligned >> - * operations, or io operations to proceed. Return the host address. */ >> +/* >> + * Probe for an atomic operation. Do not allow unaligned operations, >> + * or io operations to proceed. Return the host address. >> + * >> + * @prot may be PAGE_READ, PAGE_WRITE, or PAGE_READ|PAGE_WRITE. >> + */ >> static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, >> - TCGMemOpIdx oi, uintptr_t retaddr) >> + TCGMemOpIdx oi, int prot, uintptr_t retaddr) >> { >> size_t mmu_idx = get_mmuidx(oi); >> - uintptr_t index = tlb_index(env, mmu_idx, addr); >> - CPUTLBEntry *tlbe = tlb_entry(env, mmu_idx, addr); >> - target_ulong tlb_addr = tlb_addr_write(tlbe); >> MemOp mop = get_memop(oi); >> int a_bits = get_alignment_bits(mop); >> int s_bits = mop & MO_SIZE; >> + uintptr_t index; >> + CPUTLBEntry *tlbe; >> + target_ulong tlb_addr; >> void *hostaddr; >> >> /* Adjust the given return address. */ >> @@ -1775,15 +1779,45 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, >> goto stop_the_world; >> } >> >> + index = tlb_index(env, mmu_idx, addr); >> + tlbe = tlb_entry(env, mmu_idx, addr); >> + >> /* Check TLB entry and enforce page permissions. */ >> - if (!tlb_hit(tlb_addr, addr)) { >> - if (!VICTIM_TLB_HIT(addr_write, addr)) { >> - tlb_fill(env_cpu(env), addr, 1 << s_bits, MMU_DATA_STORE, >> - mmu_idx, retaddr); >> - index = tlb_index(env, mmu_idx, addr); >> - tlbe = tlb_entry(env, mmu_idx, addr); >> + if (prot & PAGE_WRITE) { >> + tlb_addr = tlb_addr_write(tlbe); >> + if (!tlb_hit(tlb_addr, addr)) { >> + if (!VICTIM_TLB_HIT(addr_write, addr)) { >> + tlb_fill(env_cpu(env), addr, 1 << s_bits, >> + MMU_DATA_STORE, mmu_idx, retaddr); >> + index = tlb_index(env, mmu_idx, addr); >> + tlbe = tlb_entry(env, mmu_idx, addr); >> + } >> + tlb_addr = tlb_addr_write(tlbe) & ~TLB_INVALID_MASK; >> + } >> + >> + /* Let the guest notice RMW on a write-only page. */ >> + if ((prot & PAGE_READ) && >> + unlikely(tlbe->addr_read != (tlb_addr & ~TLB_NOTDIRTY))) { >> + tlb_fill(env_cpu(env), addr, 1 << s_bits, >> + MMU_DATA_LOAD, mmu_idx, retaddr); >> + /* >> + * Since we don't support reads and writes to different addresses, >> + * and we do have the proper page loaded for write, this shouldn't >> + * ever return. But just in case, handle via stop-the-world. >> + */ >> + goto stop_the_world; >> + } >> + } else /* if (prot & PAGE_READ) */ { > > I guess the compiler doesn't have enough info to know that !PROT_WRITE > implies PROT_READ and ends up doing an extra check it doesn't need to otherwise? I didn't even look at the compiler output. r~ > > Otherwise seems sane to me: > > Reviewed-by: Alex Bennée >