From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tomi Valkeinen Subject: Re: [ADV7393] DRM Encoder Slave or DRM Bridge Date: Fri, 23 Sep 2016 14:00:05 +0300 Message-ID: References: <52026ed7-fbfc-48a0-b2ea-07577d49231d@ti.com> <3958e459-2127-4450-9749-913365949996@ti.com> <406769ce-bbd0-c517-3006-c5f1ab6ff511@ti.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0168631766==" Return-path: Received: from bear.ext.ti.com (bear.ext.ti.com [198.47.19.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 769D96EA24 for ; Fri, 23 Sep 2016 11:00:14 +0000 (UTC) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Vikas Patil Cc: "dri-devel@lists.freedesktop.org" List-Id: dri-devel@lists.freedesktop.org --===============0168631766== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="3TW2nr1EQoSimwImleLEEsGa48218ibVi" --3TW2nr1EQoSimwImleLEEsGa48218ibVi Content-Type: multipart/mixed; boundary="Hef1afAO0cwi6PiUo99tCi34PbFSkJ519"; protected-headers="v1" From: Tomi Valkeinen To: Vikas Patil Cc: "dri-devel@lists.freedesktop.org" , Rob Clark , architt@codeaurora.org Message-ID: Subject: Re: [ADV7393] DRM Encoder Slave or DRM Bridge References: <52026ed7-fbfc-48a0-b2ea-07577d49231d@ti.com> <3958e459-2127-4450-9749-913365949996@ti.com> <406769ce-bbd0-c517-3006-c5f1ab6ff511@ti.com> In-Reply-To: --Hef1afAO0cwi6PiUo99tCi34PbFSkJ519 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 22/09/16 16:22, Vikas Patil wrote: > Could you help me to understand if I could use =E2=80=9Cinterlace=3Dfal= se=E2=80=9D? > ADV7393 seems to be supporting non-interlaced mode. From datasheet: > =E2=80=9CThe ADV7390/ADV7391/ADV7392/ADV7393 support an SD noninterlace= d mode. > Using this mode, progressive inputs at twice the frame rate of NTSC > and PAL (240p/59.94 Hz and 288p/50 Hz, respectively) can be input into > the ADV7390/ ADV7391/ADV7392/ADV7393. The SD noninterlaced mode can be > enabled using Subaddress 0x88, Bit 1.=E2=80=9D Difficult to say... So OMAP4+ DSS hardware does support interlace output for DPI. The driver has never supported it, nor do I have any hardware to test it. It might be quite easy to add, though. If I read the above snippet right, to use progressive input, the DISPC needs to output at double refresh rate. So probably what you would have to do is in ADV driver, you have your set_timings function, where you should double the pix clock before you pass the timings forward to the DISPC's DPI driver. Tomi --Hef1afAO0cwi6PiUo99tCi34PbFSkJ519-- --3TW2nr1EQoSimwImleLEEsGa48218ibVi Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJX5Qs2AAoJEPo9qoy8lh710w8P/2qqNf5Vmd2i+NZ1xr6qgOWo vJhu5fVPNWJWMIuIW5RJ44I84rzK2u/o/vQjD9x5Hhw8O7O1g/h8j3DbW4FZm4qP NNCHTl4VQvbAWJv1f9YamCHeZGpWYDVWLj6USVGCMhx8aReDxhEsIDsiHFwkw/Lc WRdNmDwsrYfc1NK0QzCjjTpTjU3zKAWFO+P/7QLaBNB76N+V2LVaLl6R4rhAsbKO e//MEMx9HYjFqBJPFYZ6LU+yx2T86HoqH2m8uxGKT6a3K3VlIE6rRPXkwn8LT2gX RweQF+Wg39C65WvZ0vbKWPnVhNIugASfnI82E3Ls3F4ksy2iwfrp/BreAS6xhrxr HjBcn13rB8EAM7XjhxbtYYqDsFbnDSjgZBhnxZeAmFWxmnqkkRaZ/Ir+ym8xGoT/ JjORRqOMBNX6dzoWKGPj6dtwDlDLNIV4j/yI/x0b2b4vMFS2Q067kwEHQV4S58/Y WmoVn3mmXXqbREJYcFX33PxoQCGsnYUOfQRAAYInlV1UI+kTYQM9VJIJjG+u5s5v uEn1IGxxpKCYjfkZ6jBkjwVNPeu1x1bArFQe0gB4BHLnPlHWg0dijvZ48dvVsMQx p8MFNswUzoQpduJEvXIuday6iU1TGd10gsVS4gT8yTVTMGx1HIvLhINhzt5RLWOQ QK5++lJRB2L4w8dNKgMf =jHGb -----END PGP SIGNATURE----- --3TW2nr1EQoSimwImleLEEsGa48218ibVi-- --===============0168631766== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== --===============0168631766==--