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Thu, 23 Mar 2023 15:35:30 +0000 (GMT) Message-ID: Date: Thu, 23 Mar 2023 10:35:29 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 2/3] TPM TIS: Add support for TPM devices over I2C bus Content-Language: en-US To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , Ninad Palsule , qemu-devel@nongnu.org Cc: joel@jms.id.au, andrew@aj.id.au, stefanb@linux.ibm.com References: <20230323030119.2113570-1-ninad@linux.ibm.com> <20230323030119.2113570-3-ninad@linux.ibm.com> <18fd2a6a-a7e6-f9d4-e993-05dc2142f4d4@kaod.org> From: Ninad Palsule In-Reply-To: <18fd2a6a-a7e6-f9d4-e993-05dc2142f4d4@kaod.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: QOVGflaazH9fKbkc5VOKFi--kuWIGqFK X-Proofpoint-GUID: QOVGflaazH9fKbkc5VOKFi--kuWIGqFK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-22_21,2023-03-23_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 malwarescore=0 suspectscore=0 adultscore=0 bulkscore=0 impostorscore=0 mlxlogscore=999 phishscore=0 priorityscore=1501 spamscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303150002 definitions=main-2303230113 Received-SPF: none client-ip=148.163.158.5; envelope-from=ninad@linux.vnet.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/23/23 2:44 AM, Cédric Le Goater wrote: > On 3/23/23 04:01, Ninad Palsule wrote: >> Qemu already supports devices attached to ISA and sysbus. This drop adds >> support for the I2C bus attached TPM devices. >> >> This commit includes changes for the common code. >> - Added support for the new checksum registers which are required for >>    the I2C support. The checksum calculation is handled in the qemu >>    common code. >> - Added wrapper function for read and write data so that I2C code can >>    call it without MMIO interface. >> >> Signed-off-by: Ninad Palsule >> --- >> V2: >> >> Incorporated Stephen's comments. >> >> - Removed checksum enable and checksum get registers. >> - Added checksum calculation function which can be called from >>    i2c layer. >> --- >>   hw/tpm/tpm_tis.h        |  3 +++ >>   hw/tpm/tpm_tis_common.c | 32 ++++++++++++++++++++++++++++++++ >>   2 files changed, 35 insertions(+) >> >> diff --git a/hw/tpm/tpm_tis.h b/hw/tpm/tpm_tis.h >> index f6b5872ba6..6f29a508dd 100644 >> --- a/hw/tpm/tpm_tis.h >> +++ b/hw/tpm/tpm_tis.h >> @@ -86,5 +86,8 @@ int tpm_tis_pre_save(TPMState *s); >>   void tpm_tis_reset(TPMState *s); >>   enum TPMVersion tpm_tis_get_tpm_version(TPMState *s); >>   void tpm_tis_request_completed(TPMState *s, int ret); >> +uint32_t tpm_tis_read_data(TPMState *s, hwaddr addr, unsigned size); >> +void tpm_tis_write_data(TPMState *s, hwaddr addr, uint64_t val, >> uint32_t size); >> +uint16_t tpm_tis_get_checksum(TPMState *s); >>     #endif /* TPM_TPM_TIS_H */ >> diff --git a/hw/tpm/tpm_tis_common.c b/hw/tpm/tpm_tis_common.c >> index 503be2a541..b1acde74cb 100644 >> --- a/hw/tpm/tpm_tis_common.c >> +++ b/hw/tpm/tpm_tis_common.c >> @@ -26,6 +26,8 @@ >>   #include "hw/irq.h" >>   #include "hw/isa/isa.h" >>   #include "qapi/error.h" >> +#include "qemu/bswap.h" >> +#include "qemu/crc-ccitt.h" >>   #include "qemu/module.h" >>     #include "hw/acpi/tpm.h" >> @@ -447,6 +449,27 @@ static uint64_t tpm_tis_mmio_read(void *opaque, >> hwaddr addr, >>       return val; >>   } >>   +/* >> + * A wrapper read function so that it can be directly called without >> + * mmio. >> + */ >> +uint32_t tpm_tis_read_data(TPMState *s, hwaddr addr, unsigned size) >> +{ >> +    return tpm_tis_mmio_read(s, addr, size); >> +} >> + >> +/* >> + * Calculate current data buffer checksum >> + */ >> +uint16_t tpm_tis_get_checksum(TPMState *s) >> +{ >> +    uint16_t val = 0xffff; >> + >> +    val = cpu_to_be16(crc_ccitt(0, s->buffer, s->rw_offset)); > > this routine could simply return cpu_to_be16(.... > Done. Thank you for the review. Ninad > Thanks, > > C. > > >> + >> +    return val; >> +} >> + >>   /* >>    * Write a value to a register of the TIS interface >>    * See specs pages 33-63 for description of the registers >> @@ -767,6 +790,15 @@ static void tpm_tis_mmio_write(void *opaque, >> hwaddr addr, >>       } >>   } >>   +/* >> + * A wrapper write function so that it can be directly called without >> + * mmio. >> + */ >> +void tpm_tis_write_data(TPMState *s, hwaddr addr, uint64_t val, >> uint32_t size) >> +{ >> +    tpm_tis_mmio_write(s, addr, val, size); >> +} >> + >>   const MemoryRegionOps tpm_tis_memory_ops = { >>       .read = tpm_tis_mmio_read, >>       .write = tpm_tis_mmio_write, >