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([2a01:e34:ed2f:f020:9cff:9584:adb2:6288]) by smtp.googlemail.com with ESMTPSA id j6sm305914wrq.38.2020.12.03.10.09.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 03 Dec 2020 10:09:25 -0800 (PST) Subject: Re: [PATCH v1 2/2] clocksource: Add Intel Keem Bay Timer Support To: vijayakannan.ayyathurai@intel.com, tglx@linutronix.de, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, andriy.shevchenko@linux.intel.com, mgross@linux.intel.com, wan.ahmad.zainie.wan.mohamad@intel.com, lakshmi.bai.raja.subramanian@intel.com References: From: Daniel Lezcano Message-ID: Date: Thu, 3 Dec 2020 19:09:24 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 26/11/2020 11:34, vijayakannan.ayyathurai@intel.com wrote: > From: Vijayakannan Ayyathurai > > Add generic clocksource and clockevent driver for the timer IP > used in Intel Keem Bay SoC. > > One free running Counter used as a clocksource device and one Timer > used as a clockevent device. Both are enabled through TIM_GEN_CONFIG > register. This register is in the DT resource index 1. > > Timer/Counter base register is in the DT resource index 0 > and it's map/unmap handled by TIMER OF api. > > Signed-off-by: Vijayakannan Ayyathurai > Acked-by: Mark Gross > Acked-by: Andy Shevchenko > --- > drivers/clocksource/Kconfig | 10 ++ > drivers/clocksource/Makefile | 1 + > drivers/clocksource/timer-keembay.c | 221 ++++++++++++++++++++++++++++ > 3 files changed, 232 insertions(+) > create mode 100644 drivers/clocksource/timer-keembay.c > > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig > index 68b087bff59c..b1f29e12c571 100644 > --- a/drivers/clocksource/Kconfig > +++ b/drivers/clocksource/Kconfig > @@ -738,4 +738,14 @@ config MICROCHIP_PIT64B > modes and high resolution. It is used as a clocksource > and a clockevent. > > +config KEEMBAY_TIMER > + bool "Intel Keem Bay timer driver" > + depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST) The timer drivers subsystem wants silent options and let the platform to select the timer. Please select the timer in arch/arm64/Kconfig.platforms in the ARCH_KEEMBAY section. So it would come: config KEEMBAY_TIMER bool "bla bla" if COMPILE_TEST > + select TIMER_OF > + help > + This option enables the support for the Intel Keem Bay general > + purpose timer and free running counter driver. Each timer can > + generate an individual interrupt and the 64 bit counter can also > + be used as one of the clock source. > + [ ... ] > +static struct timer_of keembay_ce_to = { > + .flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK, > + .clkevt = { > + .name = "keembay_timer", > + .features = CLOCK_EVT_FEAT_PERIODIC | > + CLOCK_EVT_FEAT_ONESHOT, May be consider CLOCK_EVT_FEAT_DYNIRQ ? see commit d2348fb6fdc6d67 Other than that, LGTM Thanks -- Daniel -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog