From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5D96C433DB for ; Thu, 21 Jan 2021 16:36:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A2B2123A22 for ; Thu, 21 Jan 2021 16:36:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387981AbhAUQgd (ORCPT ); Thu, 21 Jan 2021 11:36:33 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:59174 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387838AbhAUQgP (ORCPT ); Thu, 21 Jan 2021 11:36:15 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 10LGYY9Z015105; Thu, 21 Jan 2021 10:34:34 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1611246874; bh=0C95p2TJTee5NxsyRqKfLfHSXpWD72818vOy9G5u+38=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=FH8Xhebb3350iM8nhIDQOnYQxWmoOTkgmoitHE8kxCyvg7xTpSt3686nNM9Z9dVRE Dk3d7VwtM1jZYfUBDWr/uGU/4+QfQt+ErnceXkBQcx8nOeZirg/5e/h7xE5YGthAhm f7bJ7aZzGKXs1Glgz7r3ECrwE4tW5QTzjm4HBX44= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 10LGYYDs048024 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 21 Jan 2021 10:34:34 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 21 Jan 2021 10:34:34 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 21 Jan 2021 10:34:34 -0600 Received: from [10.250.35.71] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10LGYXba105581; Thu, 21 Jan 2021 10:34:33 -0600 Subject: Re: [PATCH] arm64: dts: ti: k3: mmc: fix dtbs_check warnings To: Grygorii Strashko , Nishanth Menon , , , Faiz Abbas CC: , Rob Herring , Vignesh Raghavendra , Ulf Hansson , Aswath Govindraju References: <20210115193016.5581-1-grygorii.strashko@ti.com> From: Suman Anna Message-ID: Date: Thu, 21 Jan 2021 10:34:33 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210115193016.5581-1-grygorii.strashko@ti.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/15/21 1:30 PM, Grygorii Strashko wrote: > Now the dtbs_check produces below warnings > sdhci@4f80000: clock-names:0: 'clk_ahb' was expected > sdhci@4f80000: clock-names:1: 'clk_xin' was expected > $nodename:0: 'sdhci@4f80000' does not match '^mmc(@.*)?$' > > Fix above warnings by updating mmc DT definitions to follow > sdhci-am654.yaml bindings: > - rename sdhci dt nodes to 'mmc@' > - swap clk_xin/clk_ahb clocks, the clk_ahb clock expected to be defined > first > > Signed-off-by: Grygorii Strashko Thanks for fixing these Grygorii, Reviewed-by: Suman Anna On a side note, there are still couple more warnings on J721E dtb /uhome/projects/opensrc/kernels/linux-next/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: mmc@4fb0000: compatible: More than one condition true in oneOf schema: {'oneOf': [{'additionalItems': False, 'items': [{'const': 'ti,am654-sdhci-5.1'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j721e-sdhci-8bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j721e-sdhci-4bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j721e-sdhci-4bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,am64-sdhci-8bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,am64-sdhci-4bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j7200-sdhci-8bit'}, {'const': 'ti,j721e-sdhci-8bit'}], 'maxItems': 2, 'minItems': 2, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j7200-sdhci-4bit'}, {'const': 'ti,j721e-sdhci-4bit'}], 'maxItems': 2, 'minItems': 2, 'type': 'array'}]} From schema: /uhome/projects/opensrc/kernels/linux-next/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml Also, the YAML itself can do with some improvements. I see a minItems of 1, so I am assuming clk_ahb is always the mandatory clock where applicable, can you confirm? regards Suman > --- > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 4 ++-- > arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 8 ++++---- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 18 +++++++++--------- > 3 files changed, 15 insertions(+), 15 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > index 12591a854020..ceb579fb427d 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > @@ -256,7 +256,7 @@ > #size-cells = <0>; > }; > > - sdhci0: sdhci@4f80000 { > + sdhci0: mmc@4f80000 { > compatible = "ti,am654-sdhci-5.1"; > reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; > power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>; > @@ -280,7 +280,7 @@ > dma-coherent; > }; > > - sdhci1: sdhci@4fa0000 { > + sdhci1: mmc@4fa0000 { > compatible = "ti,am654-sdhci-5.1"; > reg = <0x0 0x4fa0000 0x0 0x260>, <0x0 0x4fb0000 0x0 0x134>; > power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > index 4e39f0325c03..3f23b913b498 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > @@ -506,8 +506,8 @@ > reg = <0x00 0x04f80000 0x00 0x260>, <0x00 0x4f88000 0x00 0x134>; > interrupts = ; > power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 91 3>, <&k3_clks 91 0>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 91 0>, <&k3_clks 91 3>; > ti,otap-del-sel-legacy = <0x0>; > ti,otap-del-sel-mmc-hs = <0x0>; > ti,otap-del-sel-ddr52 = <0x6>; > @@ -525,8 +525,8 @@ > reg = <0x00 0x04fb0000 0x00 0x260>, <0x00 0x4fb8000 0x00 0x134>; > interrupts = ; > power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 92 2>, <&k3_clks 92 1>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 92 1>, <&k3_clks 92 2>; > ti,otap-del-sel-legacy = <0x0>; > ti,otap-del-sel-sd-hs = <0x0>; > ti,otap-del-sel-sdr12 = <0xf>; > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index 2d526ea44a85..8c84dafb7125 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -1032,13 +1032,13 @@ > clock-names = "gpio"; > }; > > - main_sdhci0: sdhci@4f80000 { > + main_sdhci0: mmc@4f80000 { > compatible = "ti,j721e-sdhci-8bit"; > reg = <0x0 0x4f80000 0x0 0x1000>, <0x0 0x4f88000 0x0 0x400>; > interrupts = ; > power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 91 1>, <&k3_clks 91 0>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 91 0>, <&k3_clks 91 1>; > assigned-clocks = <&k3_clks 91 1>; > assigned-clock-parents = <&k3_clks 91 2>; > bus-width = <8>; > @@ -1054,13 +1054,13 @@ > dma-coherent; > }; > > - main_sdhci1: sdhci@4fb0000 { > + main_sdhci1: mmc@4fb0000 { > compatible = "ti,j721e-sdhci-4bit"; > reg = <0x0 0x04fb0000 0x0 0x1000>, <0x0 0x4fb8000 0x0 0x400>; > interrupts = ; > power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 92 0>, <&k3_clks 92 5>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 92 5>, <&k3_clks 92 0>; > assigned-clocks = <&k3_clks 92 0>; > assigned-clock-parents = <&k3_clks 92 1>; > ti,otap-del-sel-legacy = <0x0>; > @@ -1074,13 +1074,13 @@ > dma-coherent; > }; > > - main_sdhci2: sdhci@4f98000 { > + main_sdhci2: mmc@4f98000 { > compatible = "ti,j721e-sdhci-4bit"; > reg = <0x0 0x4f98000 0x0 0x1000>, <0x0 0x4f90000 0x0 0x400>; > interrupts = ; > power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 93 0>, <&k3_clks 93 5>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 93 5>, <&k3_clks 93 0>; > assigned-clocks = <&k3_clks 93 0>; > assigned-clock-parents = <&k3_clks 93 1>; > ti,otap-del-sel-legacy = <0x0>; > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CFD3C433DB for ; Thu, 21 Jan 2021 16:36:24 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0AEF523A24 for ; Thu, 21 Jan 2021 16:36:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0AEF523A24 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=eT3RfWLVpJhD5DH2INksxYkVLF39/yPE2Y7SwsVW7lk=; b=LjpdaNwYVkFH6WqogzSmNPplO R/FFfUA3Tf1JSabHYbMyB48LMXWJEYbX3KClhd/pel+GduMybdEvPp5DXs91IV7Ci5lNfH/Ka2l1v MRIDNpWwWVXMEZqokj4prwGSBqClZ/rGk6ogpNIOftpyvfESk8j+9ujqCz6eu+U7JUIsTI2nlmESC TbOCiWddBsj3ytZ/7xtx6pBnii6hbxxnZp6KfrFrm7vahQczfHcs1ZqQQppXO1K+qKIiITyhhBTua oZHeVNt2SyAZy/QwJg2HiqnEa9wPE2J+WYFWNmudd60XBpNQ+T8aV4JBIoTMHuJFHcNpY4h50+TQh mI5a4lV2w==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l2cuu-0001BN-FX; Thu, 21 Jan 2021 16:34:40 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l2cur-0001At-O9 for linux-arm-kernel@lists.infradead.org; Thu, 21 Jan 2021 16:34:38 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 10LGYY9Z015105; Thu, 21 Jan 2021 10:34:34 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1611246874; bh=0C95p2TJTee5NxsyRqKfLfHSXpWD72818vOy9G5u+38=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=FH8Xhebb3350iM8nhIDQOnYQxWmoOTkgmoitHE8kxCyvg7xTpSt3686nNM9Z9dVRE Dk3d7VwtM1jZYfUBDWr/uGU/4+QfQt+ErnceXkBQcx8nOeZirg/5e/h7xE5YGthAhm f7bJ7aZzGKXs1Glgz7r3ECrwE4tW5QTzjm4HBX44= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 10LGYYDs048024 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 21 Jan 2021 10:34:34 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 21 Jan 2021 10:34:34 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 21 Jan 2021 10:34:34 -0600 Received: from [10.250.35.71] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10LGYXba105581; Thu, 21 Jan 2021 10:34:33 -0600 Subject: Re: [PATCH] arm64: dts: ti: k3: mmc: fix dtbs_check warnings To: Grygorii Strashko , Nishanth Menon , , , Faiz Abbas References: <20210115193016.5581-1-grygorii.strashko@ti.com> From: Suman Anna Message-ID: Date: Thu, 21 Jan 2021 10:34:33 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210115193016.5581-1-grygorii.strashko@ti.com> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210121_113437_889253_71ED9137 X-CRM114-Status: GOOD ( 19.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aswath Govindraju , Ulf Hansson , Rob Herring , linux-kernel@vger.kernel.org, Vignesh Raghavendra Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/15/21 1:30 PM, Grygorii Strashko wrote: > Now the dtbs_check produces below warnings > sdhci@4f80000: clock-names:0: 'clk_ahb' was expected > sdhci@4f80000: clock-names:1: 'clk_xin' was expected > $nodename:0: 'sdhci@4f80000' does not match '^mmc(@.*)?$' > > Fix above warnings by updating mmc DT definitions to follow > sdhci-am654.yaml bindings: > - rename sdhci dt nodes to 'mmc@' > - swap clk_xin/clk_ahb clocks, the clk_ahb clock expected to be defined > first > > Signed-off-by: Grygorii Strashko Thanks for fixing these Grygorii, Reviewed-by: Suman Anna On a side note, there are still couple more warnings on J721E dtb /uhome/projects/opensrc/kernels/linux-next/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: mmc@4fb0000: compatible: More than one condition true in oneOf schema: {'oneOf': [{'additionalItems': False, 'items': [{'const': 'ti,am654-sdhci-5.1'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j721e-sdhci-8bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j721e-sdhci-4bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j721e-sdhci-4bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,am64-sdhci-8bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,am64-sdhci-4bit'}], 'maxItems': 1, 'minItems': 1, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j7200-sdhci-8bit'}, {'const': 'ti,j721e-sdhci-8bit'}], 'maxItems': 2, 'minItems': 2, 'type': 'array'}, {'additionalItems': False, 'items': [{'const': 'ti,j7200-sdhci-4bit'}, {'const': 'ti,j721e-sdhci-4bit'}], 'maxItems': 2, 'minItems': 2, 'type': 'array'}]} From schema: /uhome/projects/opensrc/kernels/linux-next/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml Also, the YAML itself can do with some improvements. I see a minItems of 1, so I am assuming clk_ahb is always the mandatory clock where applicable, can you confirm? regards Suman > --- > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 4 ++-- > arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 8 ++++---- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 18 +++++++++--------- > 3 files changed, 15 insertions(+), 15 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > index 12591a854020..ceb579fb427d 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > @@ -256,7 +256,7 @@ > #size-cells = <0>; > }; > > - sdhci0: sdhci@4f80000 { > + sdhci0: mmc@4f80000 { > compatible = "ti,am654-sdhci-5.1"; > reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; > power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>; > @@ -280,7 +280,7 @@ > dma-coherent; > }; > > - sdhci1: sdhci@4fa0000 { > + sdhci1: mmc@4fa0000 { > compatible = "ti,am654-sdhci-5.1"; > reg = <0x0 0x4fa0000 0x0 0x260>, <0x0 0x4fb0000 0x0 0x134>; > power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > index 4e39f0325c03..3f23b913b498 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi > @@ -506,8 +506,8 @@ > reg = <0x00 0x04f80000 0x00 0x260>, <0x00 0x4f88000 0x00 0x134>; > interrupts = ; > power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 91 3>, <&k3_clks 91 0>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 91 0>, <&k3_clks 91 3>; > ti,otap-del-sel-legacy = <0x0>; > ti,otap-del-sel-mmc-hs = <0x0>; > ti,otap-del-sel-ddr52 = <0x6>; > @@ -525,8 +525,8 @@ > reg = <0x00 0x04fb0000 0x00 0x260>, <0x00 0x4fb8000 0x00 0x134>; > interrupts = ; > power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 92 2>, <&k3_clks 92 1>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 92 1>, <&k3_clks 92 2>; > ti,otap-del-sel-legacy = <0x0>; > ti,otap-del-sel-sd-hs = <0x0>; > ti,otap-del-sel-sdr12 = <0xf>; > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index 2d526ea44a85..8c84dafb7125 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -1032,13 +1032,13 @@ > clock-names = "gpio"; > }; > > - main_sdhci0: sdhci@4f80000 { > + main_sdhci0: mmc@4f80000 { > compatible = "ti,j721e-sdhci-8bit"; > reg = <0x0 0x4f80000 0x0 0x1000>, <0x0 0x4f88000 0x0 0x400>; > interrupts = ; > power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 91 1>, <&k3_clks 91 0>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 91 0>, <&k3_clks 91 1>; > assigned-clocks = <&k3_clks 91 1>; > assigned-clock-parents = <&k3_clks 91 2>; > bus-width = <8>; > @@ -1054,13 +1054,13 @@ > dma-coherent; > }; > > - main_sdhci1: sdhci@4fb0000 { > + main_sdhci1: mmc@4fb0000 { > compatible = "ti,j721e-sdhci-4bit"; > reg = <0x0 0x04fb0000 0x0 0x1000>, <0x0 0x4fb8000 0x0 0x400>; > interrupts = ; > power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 92 0>, <&k3_clks 92 5>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 92 5>, <&k3_clks 92 0>; > assigned-clocks = <&k3_clks 92 0>; > assigned-clock-parents = <&k3_clks 92 1>; > ti,otap-del-sel-legacy = <0x0>; > @@ -1074,13 +1074,13 @@ > dma-coherent; > }; > > - main_sdhci2: sdhci@4f98000 { > + main_sdhci2: mmc@4f98000 { > compatible = "ti,j721e-sdhci-4bit"; > reg = <0x0 0x4f98000 0x0 0x1000>, <0x0 0x4f90000 0x0 0x400>; > interrupts = ; > power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>; > - clock-names = "clk_xin", "clk_ahb"; > - clocks = <&k3_clks 93 0>, <&k3_clks 93 5>; > + clock-names = "clk_ahb", "clk_xin"; > + clocks = <&k3_clks 93 5>, <&k3_clks 93 0>; > assigned-clocks = <&k3_clks 93 0>; > assigned-clock-parents = <&k3_clks 93 1>; > ti,otap-del-sel-legacy = <0x0>; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel