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From: Sibi Sankar <sibis@codeaurora.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Matthias Kaehlcke <mka@chromium.org>,
	sboyd@kernel.org, robh+dt@kernel.org, viresh.kumar@linaro.org,
	agross@kernel.org, rjw@rjwysocki.net,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	dianders@chromium.org, tdas@codeaurora.org
Subject: Re: [PATCH 3/4] arm64: dts: qcom: sc7280: Fixup the cpufreq node
Date: Mon, 06 Sep 2021 08:50:36 +0530	[thread overview]
Message-ID: <fde7bac239f796b039b9be58b391fb77@codeaurora.org> (raw)
In-Reply-To: <YS5hDq+xblntYbh0@ripper>

On 2021-08-31 22:34, Bjorn Andersson wrote:
> On Tue 31 Aug 08:30 PDT 2021, Matthias Kaehlcke wrote:
> 
>> On Thu, Jul 29, 2021 at 11:34:44PM +0530, Sibi Sankar wrote:
>> > Fixup the register regions used by the cpufreq node on SC7280 SoC to
>> > support per core L3 DCVS.
>> >
>> > Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node")
>> > Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> 
>> This patch landed in the Bjorn's tree, however the corresponding 
>> driver
>> change ("cpufreq: qcom: Re-arrange register offsets to support per 
>> core
>> L3 DCVS" / 
>> https://patchwork.kernel.org/project/linux-arm-msm/patch/1627581885-32165-3-git-send-email-sibis@codeaurora.org/)
>> did not land in any maintainer tree yet AFAIK. IIUC the DT change 
>> alone
>> breaks cpufreq since the changed register regions require the changed
>> offset in the cpufreq driver.
>> 
> 
> Thanks for the note Matthias, it must have slipped by as I scraped the
> inbox for things that looked ready.
> 
> I'm actually not in favor of splitting these memory blocks in DT to
> facilitate the Linux implementation of splitting that in multiple
> drivers...
> 
> But I've not been following up on that discussion.
> 
> Regards,
> Bjorn
> 
>> Sibi, please confirm or clarify that my concern is unwarranted.

Let's drop the patch asap as it breaks
SC7280 cpufreq on lnext without the driver
changes.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

  reply	other threads:[~2021-09-06  3:20 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-29 18:04 [PATCH 0/4] Fixup register offsets to support per core L3 DCVS Sibi Sankar
2021-07-29 18:04 ` [PATCH 1/4] dt-bindings: cpufreq: cpufreq-qcom-hw: Add compatible for SM8250/8350 Sibi Sankar
2021-08-03 19:23   ` Rob Herring
2021-08-04 18:56   ` Stephen Boyd
2021-07-29 18:04 ` [PATCH 2/4] cpufreq: qcom: Re-arrange register offsets to support per core L3 DCVS Sibi Sankar
2021-08-04 19:01   ` Stephen Boyd
2021-08-05 17:47     ` Sibi Sankar
2021-08-05 18:25       ` Stephen Boyd
2021-08-06  6:42         ` Sibi Sankar
2021-08-04 23:11   ` Bjorn Andersson
2021-08-04 23:20     ` Bjorn Andersson
2021-07-29 18:04 ` [PATCH 3/4] arm64: dts: qcom: sc7280: Fixup the cpufreq node Sibi Sankar
2021-08-04 18:57   ` Stephen Boyd
2021-08-31 15:30   ` Matthias Kaehlcke
2021-08-31 17:04     ` Bjorn Andersson
2021-09-06  3:20       ` Sibi Sankar [this message]
2021-09-07 19:14         ` Doug Anderson
2021-07-29 18:04 ` [PATCH 4/4] arm64: dts: qcom: sm8350: " Sibi Sankar
2021-08-04 22:59   ` Bjorn Andersson
2021-08-04 23:58     ` Matthias Kaehlcke
2021-08-30  6:47       ` Sibi Sankar

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