From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 663D9C433F5 for ; Wed, 11 May 2022 08:31:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pnehyItIsKxGfDkpOF4uiCW9MpcaVdMKdxUWPpyqC8o=; b=B1NSLJnZfiTD2v hEQ1LAVoubtzRvtT0e8GIzw+wE+JDqaDaSbIjjcYQPSfI7JJBNWLslkihQ3gqHiC9S8RyXuTXqkW/ us0KVnuXsySZhRPUqEqFK8iLoPZLxa2lAeCPfydFYVTOJWvUYvFaTb8QSUSR+jqflzq3bGx6nSkyp /0PnoXxDwtD9sHknjziAbFSGam4sMIpieJYMStRiyB9fkKZdRvy7jgA3nNwXKLDV3p7SWoEdwpCIr hJfiZTN9Ifjbu+oWmzepqIlsKp7spgz+V/EoLt2auDrg4YZ0XfNqOVoFh7h5EW9WZ08x/0cMX427a bRsiPVsVMDzjuGUK2VVw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nohl5-005xQm-AJ; Wed, 11 May 2022 08:31:47 +0000 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nohky-005xGS-Kb for linux-riscv@lists.infradead.org; Wed, 11 May 2022 08:31:42 +0000 Received: by mail-pf1-x431.google.com with SMTP id p12so1416585pfn.0 for ; Wed, 11 May 2022 01:31:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references:in-reply-to :references; bh=9DDx0IFq0rFZB0Z2ZzpiVoBVEGPTvAItk8MwFiFZRtc=; b=YpPl60Nhwk/OdiyJpYlA8Ekm9d8dlN/g8aKTGRzi0aZV1mrWvjSDLrHaHAGKTSQATO ypdpf4/+azIERpDxCu3B3iePwgaZakOuCOmYsn5lzEVtNGup2fLSjyFdiJzZ+X/VS7mD EszWsPHKq8OYHgl3nhr3KcWsRDJ5xis7H/6viosa0QuMQrnmyht6rFxY7H7gRbrQ8GoE Qg/F3iZCG1yc/vyWCTgRMm1ssexS09M7Zyn2598mD1fxhkH+EFpA8mOTJv9YYlBu8PVl 1OuHZrAfVE3zHuNhqelPjdxBuEn/5LGrkSIaJqvoidRRK3rPsnKlnryskXBwi11miqzd w9qA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=9DDx0IFq0rFZB0Z2ZzpiVoBVEGPTvAItk8MwFiFZRtc=; b=qPMi/hC+8Sz3aPD48igZxZ2no3BiaWC3en3QGEq85FV/HBxEyNB58tut4O3jxGld+0 k7E3y5Yd17bFqGLo26cHecE/RdpJR+cWpz0CjpAX8ER8w6qMx4pzdi6/CFVvi5LcI16X CJUpJ8wwLMzu3ryjrFgTrANbzOxocFSu+sC1wtoF3FB36XX2bhMotldg6hornwuV9oI7 sNL/A3Tg77hbBIj/6vwNHFhyKb5sAbi2ZaKxqM/Wla2G3vHJkB3Nyo3SJq37QKjxYZMJ 5Y5FVF/V//U6igndkE+O1o/g5Wd10zc1KHt44gdQC9aLqSPkXHnm59pwWhuEq8O0Nwdf BKRg== X-Gm-Message-State: AOAM533SDGsiO4zJyvtOGFz79hRFqkhB/uDBjkHblc7tClaEkqVHWkNB P+6SRq//xYpx1FxIFloeGHLcAO2S5F5Yiw== X-Google-Smtp-Source: ABdhPJxk2oyoniPig7GOpPAx4ynn5C0XjJmrO3QMW/2MjdeED1m2F1kmN59hoKaQCiyREsETUSB+3A== X-Received: by 2002:a63:5cb:0:b0:3da:fe5d:4448 with SMTP id 194-20020a6305cb000000b003dafe5d4448mr4670383pgf.583.1652257899093; Wed, 11 May 2022 01:31:39 -0700 (PDT) Received: from localhost.localdomain (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id m10-20020aa7900a000000b0050dc7628170sm1020202pfo.74.2022.05.11.01.31.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 May 2022 01:31:38 -0700 (PDT) From: Greentime Hu To: palmer@dabbelt.com, paul.walmsley@sifive.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu Subject: [PATCH v10 06/16] riscv: Reset vector register Date: Wed, 11 May 2022 08:31:16 +0000 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220511_013140_703888_6025C334 X-CRM114-Status: GOOD ( 12.05 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Guo Ren Reset vector registers at boot-time and disable vector instructions execution for kernel mode. Signed-off-by: Guo Ren Co-developed-by: Vincent Chen Signed-off-by: Vincent Chen Co-developed-by: Han-Kuan Chen Signed-off-by: Han-Kuan Chen Co-developed-by: Greentime Hu Signed-off-by: Greentime Hu Reviewed-by: Palmer Dabbelt --- arch/riscv/kernel/entry.S | 6 +++--- arch/riscv/kernel/head.S | 35 +++++++++++++++++++++++++++++------ 2 files changed, 32 insertions(+), 9 deletions(-) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index c8b9ce274b9a..559f1418e980 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -77,10 +77,10 @@ _save_context: * Disable user-mode memory access as it should only be set in the * actual user copy routines. * - * Disable the FPU to detect illegal usage of floating point in kernel - * space. + * Disable the FPU/Vector to detect illegal usage of floating point + * or vector in kernel space. */ - li t0, SR_SUM | SR_FS + li t0, SR_SUM | SR_FS | SR_VS REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 893b8bb69391..2877af90b025 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -139,10 +139,10 @@ secondary_start_sbi: .option pop /* - * Disable FPU to detect illegal usage of - * floating point in kernel space + * Disable FPU & VECTOR to detect illegal usage of + * floating point or vector in kernel space */ - li t0, SR_FS + li t0, SR_FS | SR_VS csrc CSR_STATUS, t0 /* Set trap vector to spin forever to help debug */ @@ -233,10 +233,10 @@ pmp_done: .option pop /* - * Disable FPU to detect illegal usage of - * floating point in kernel space + * Disable FPU & VECTOR to detect illegal usage of + * floating point or vector in kernel space */ - li t0, SR_FS + li t0, SR_FS | SR_VS csrc CSR_STATUS, t0 #ifdef CONFIG_RISCV_BOOT_SPINWAIT @@ -429,6 +429,29 @@ ENTRY(reset_regs) csrw fcsr, 0 /* note that the caller must clear SR_FS */ #endif /* CONFIG_FPU */ + +#ifdef CONFIG_VECTOR + csrr t0, CSR_MISA + li t1, COMPAT_HWCAP_ISA_V + and t0, t0, t1 + beqz t0, .Lreset_regs_done + + /* + * Clear vector registers and reset vcsr + * VLMAX has a defined value, VLEN is a constant, + * and this form of vsetvli is defined to set vl to VLMAX. + */ + li t1, SR_VS + csrs CSR_STATUS, t1 + csrs CSR_VCSR, x0 + vsetvli t1, x0, e8, m8, ta, ma + vmv.v.i v0, 0 + vmv.v.i v8, 0 + vmv.v.i v16, 0 + vmv.v.i v24, 0 + /* note that the caller must clear SR_VS */ +#endif /* CONFIG_VECTOR */ + .Lreset_regs_done: ret END(reset_regs) -- 2.17.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ABE0C433F5 for ; Wed, 11 May 2022 08:33:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233119AbiEKIdk (ORCPT ); Wed, 11 May 2022 04:33:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243810AbiEKIbq (ORCPT ); Wed, 11 May 2022 04:31:46 -0400 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 964513916D for ; Wed, 11 May 2022 01:31:39 -0700 (PDT) Received: by mail-pf1-x436.google.com with SMTP id x23so1356073pff.9 for ; Wed, 11 May 2022 01:31:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references:in-reply-to :references; bh=9DDx0IFq0rFZB0Z2ZzpiVoBVEGPTvAItk8MwFiFZRtc=; b=YpPl60Nhwk/OdiyJpYlA8Ekm9d8dlN/g8aKTGRzi0aZV1mrWvjSDLrHaHAGKTSQATO ypdpf4/+azIERpDxCu3B3iePwgaZakOuCOmYsn5lzEVtNGup2fLSjyFdiJzZ+X/VS7mD EszWsPHKq8OYHgl3nhr3KcWsRDJ5xis7H/6viosa0QuMQrnmyht6rFxY7H7gRbrQ8GoE Qg/F3iZCG1yc/vyWCTgRMm1ssexS09M7Zyn2598mD1fxhkH+EFpA8mOTJv9YYlBu8PVl 1OuHZrAfVE3zHuNhqelPjdxBuEn/5LGrkSIaJqvoidRRK3rPsnKlnryskXBwi11miqzd w9qA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=9DDx0IFq0rFZB0Z2ZzpiVoBVEGPTvAItk8MwFiFZRtc=; b=MQCbhb2Pnm9iWd4/NHgoIJK72wWcjgfMwQaGqrCd62tMdp2Nsxo+nZIJ+rRFRCYBsh bFDZbPI2zuh0eah1h8rRe1qKk2k6r0QYpiiTIEJHGNu38xajigMPTmRGodj+8rqhaNtV nyc/QtQRdiZFeshovx/Bb6UGArBjvmXv6M2w0YJWlwPDV9j2c7+UWZE6QOd/8BebBzZL wDCISFybEvWpngBKV5mkktLTP1aLZ7AYxL16pF1ungaUkOPqnG4QLUeRxIS8awV233wi kHhY3AuhkjT0uG3K/eawUp40eEvnjbJfeozLKinJSJikFoFqOoghRkLb1djBo+C8QU5w U/zg== X-Gm-Message-State: AOAM533z9XTDoswsJ7BnmEgyq2ics9THWOUTpm/I3EbjMa3D/WtSem5A sd51jL0Hg9Mjyen5NFmkn5JFYA== X-Google-Smtp-Source: ABdhPJxk2oyoniPig7GOpPAx4ynn5C0XjJmrO3QMW/2MjdeED1m2F1kmN59hoKaQCiyREsETUSB+3A== X-Received: by 2002:a63:5cb:0:b0:3da:fe5d:4448 with SMTP id 194-20020a6305cb000000b003dafe5d4448mr4670383pgf.583.1652257899093; Wed, 11 May 2022 01:31:39 -0700 (PDT) Received: from localhost.localdomain (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id m10-20020aa7900a000000b0050dc7628170sm1020202pfo.74.2022.05.11.01.31.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 May 2022 01:31:38 -0700 (PDT) From: Greentime Hu To: palmer@dabbelt.com, paul.walmsley@sifive.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu Subject: [PATCH v10 06/16] riscv: Reset vector register Date: Wed, 11 May 2022 08:31:16 +0000 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Guo Ren Reset vector registers at boot-time and disable vector instructions execution for kernel mode. Signed-off-by: Guo Ren Co-developed-by: Vincent Chen Signed-off-by: Vincent Chen Co-developed-by: Han-Kuan Chen Signed-off-by: Han-Kuan Chen Co-developed-by: Greentime Hu Signed-off-by: Greentime Hu Reviewed-by: Palmer Dabbelt --- arch/riscv/kernel/entry.S | 6 +++--- arch/riscv/kernel/head.S | 35 +++++++++++++++++++++++++++++------ 2 files changed, 32 insertions(+), 9 deletions(-) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index c8b9ce274b9a..559f1418e980 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -77,10 +77,10 @@ _save_context: * Disable user-mode memory access as it should only be set in the * actual user copy routines. * - * Disable the FPU to detect illegal usage of floating point in kernel - * space. + * Disable the FPU/Vector to detect illegal usage of floating point + * or vector in kernel space. */ - li t0, SR_SUM | SR_FS + li t0, SR_SUM | SR_FS | SR_VS REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 893b8bb69391..2877af90b025 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -139,10 +139,10 @@ secondary_start_sbi: .option pop /* - * Disable FPU to detect illegal usage of - * floating point in kernel space + * Disable FPU & VECTOR to detect illegal usage of + * floating point or vector in kernel space */ - li t0, SR_FS + li t0, SR_FS | SR_VS csrc CSR_STATUS, t0 /* Set trap vector to spin forever to help debug */ @@ -233,10 +233,10 @@ pmp_done: .option pop /* - * Disable FPU to detect illegal usage of - * floating point in kernel space + * Disable FPU & VECTOR to detect illegal usage of + * floating point or vector in kernel space */ - li t0, SR_FS + li t0, SR_FS | SR_VS csrc CSR_STATUS, t0 #ifdef CONFIG_RISCV_BOOT_SPINWAIT @@ -429,6 +429,29 @@ ENTRY(reset_regs) csrw fcsr, 0 /* note that the caller must clear SR_FS */ #endif /* CONFIG_FPU */ + +#ifdef CONFIG_VECTOR + csrr t0, CSR_MISA + li t1, COMPAT_HWCAP_ISA_V + and t0, t0, t1 + beqz t0, .Lreset_regs_done + + /* + * Clear vector registers and reset vcsr + * VLMAX has a defined value, VLEN is a constant, + * and this form of vsetvli is defined to set vl to VLMAX. + */ + li t1, SR_VS + csrs CSR_STATUS, t1 + csrs CSR_VCSR, x0 + vsetvli t1, x0, e8, m8, ta, ma + vmv.v.i v0, 0 + vmv.v.i v8, 0 + vmv.v.i v16, 0 + vmv.v.i v24, 0 + /* note that the caller must clear SR_VS */ +#endif /* CONFIG_VECTOR */ + .Lreset_regs_done: ret END(reset_regs) -- 2.17.1