From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E958C433F5 for ; Wed, 29 Sep 2021 17:47:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 34A3261465 for ; Wed, 29 Sep 2021 17:47:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344813AbhI2RtE (ORCPT ); Wed, 29 Sep 2021 13:49:04 -0400 Received: from mail.kernel.org ([198.145.29.99]:44628 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245131AbhI2RtB (ORCPT ); Wed, 29 Sep 2021 13:49:01 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 8312F6135E; Wed, 29 Sep 2021 17:47:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1632937640; bh=jEX9WfFfE7uc4opv3Isth3zecI1A32dpxFg6mdU08xM=; h=In-Reply-To:References:Date:From:To:Cc:Subject:From; b=LM1gtvuF6QTPazoRV7AFt66j4gUjzHljkibHjf3/NEsFv2QZO9rjpxZGFe8/KAHD0 riqHZLqqhJBcxYwr/VtdhRf5/H3W3qudXW+X1DfIR0wWVaYYaknxCnJRrYta4OSVFB EN0/wmE5CKyEHSKXmsREeDVezXzvHOuO+0MxFddJ51/+FBzyaDzys0EbVTvyMjn010 TTCf1YJNsh7cmLlhe7AbaDDTsgqQFs1v7bMoshfxq26wI/iUMTWFAPqYCm3slv2Ojr cRSgHKh5aEDvQu4yD/pdxIZtUpJQaaSUypxgrbKJCdMyqAAKZalvvMuKBZT1FaaAcL +kXeAY7LxnvUA== Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailauth.nyi.internal (Postfix) with ESMTP id A0D8C27C0054; Wed, 29 Sep 2021 13:47:18 -0400 (EDT) Received: from imap48 ([10.202.2.98]) by compute6.internal (MEProxy); Wed, 29 Sep 2021 13:47:18 -0400 X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrudekvddgudduhecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefofgggkfgjfhffhffvufgtsehttdertderredtnecuhfhrohhmpedftehn ugihucfnuhhtohhmihhrshhkihdfuceolhhuthhosehkvghrnhgvlhdrohhrgheqnecugg ftrfgrthhtvghrnheptdfhheettddvtedvtedugfeuuefhtddugedvleevleefvdetleff gfefvdekgeefnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homheprghnugihodhmvghsmhhtphgruhhthhhpvghrshhonhgrlhhithihqdduudeiudek heeifedvqddvieefudeiiedtkedqlhhuthhopeepkhgvrhhnvghlrdhorhhgsehlihhnuh igrdhluhhtohdruhhs X-ME-Proxy: Received: by mailuser.nyi.internal (Postfix, from userid 501) id 6E53E21E0063; Wed, 29 Sep 2021 13:47:18 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.5.0-alpha0-1303-gb2406efd75-fm-20210922.002-gb2406efd Mime-Version: 1.0 Message-Id: In-Reply-To: References: <87y27nfjel.ffs@tglx> <87o88jfajo.ffs@tglx> <87k0j6dsdn.ffs@tglx> <87r1d78t2e.ffs@tglx> <75e95acc-6730-ddcf-d722-66e575076256@kernel.org> <877dez8fqu.ffs@tglx> Date: Wed, 29 Sep 2021 10:46:58 -0700 From: "Andy Lutomirski" To: "Tony Luck" , "Thomas Gleixner" Cc: "Peter Zijlstra (Intel)" , "Fenghua Yu" , "Ingo Molnar" , "Borislav Petkov" , "Dave Hansen" , "Lu Baolu" , "Joerg Roedel" , "Josh Poimboeuf" , "Dave Jiang" , "Jacob Jun Pan" , "Raj Ashok" , "Shankar, Ravi V" , iommu@lists.linux-foundation.org, "the arch/x86 maintainers" , "Linux Kernel Mailing List" Subject: Re: [PATCH 5/8] x86/mmu: Add mm-based PASID refcounting Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 29, 2021, at 10:41 AM, Luck, Tony wrote: > On Wed, Sep 29, 2021 at 07:15:53PM +0200, Thomas Gleixner wrote: >> On Wed, Sep 29 2021 at 09:59, Andy Lutomirski wrote: >> > On 9/29/21 05:28, Thomas Gleixner wrote: >> >> Looking at that patch again, none of this muck in fpu__pasid_write() is >> >> required at all. The whole exception fixup is: >> >> >> >> if (!user_mode(regs)) >> >> return false; >> >> >> >> if (!current->mm->pasid) >> >> return false; >> >> >> >> if (current->pasid_activated) >> >> return false; >> > >> > <-- preemption or BH here: kaboom. >> >> Sigh, this had obviously to run in the early portion of #GP, i.e. before >> enabling interrupts. > > Like this? Obviously with some comment about why this is being done. > > diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c > index a58800973aed..a848a59291e7 100644 > --- a/arch/x86/kernel/traps.c > +++ b/arch/x86/kernel/traps.c > @@ -536,6 +536,12 @@ DEFINE_IDTENTRY_ERRORCODE(exc_general_protection) > unsigned long gp_addr; > int ret; > > + if (user_mode(regs) && current->mm->pasid && !current->pasid_activated) { > + current->pasid_activated = 1; > + wrmsrl(MSR_IA32_PASID, current->mm->pasid | MSR_IA32_PASID_VALID); > + return; > + } > + This could do with a WARN_ON_ONCE(TIF_NEED_LOAD_FPU) imo. Is instrumentation allowed to touch FPU state? > cond_local_irq_enable(regs); > > if (static_cpu_has(X86_FEATURE_UMIP)) { > > -Tony From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E666C433FE for ; Wed, 29 Sep 2021 17:47:25 +0000 (UTC) Received: from smtp2.osuosl.org (smtp2.osuosl.org [140.211.166.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E23C061503 for ; Wed, 29 Sep 2021 17:47:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E23C061503 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by smtp2.osuosl.org (Postfix) with ESMTP id A0B2B4071F; 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dkim=pass (2048-bit key) header.d=kernel.org Received: from smtp4.osuosl.org ([127.0.0.1]) by localhost (smtp4.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vgrn2GleBweM for ; Wed, 29 Sep 2021 17:47:21 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.8.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp4.osuosl.org (Postfix) with ESMTPS id 1B8DA4218B for ; Wed, 29 Sep 2021 17:47:20 +0000 (UTC) Received: by mail.kernel.org (Postfix) with ESMTPSA id 8312F6135E; Wed, 29 Sep 2021 17:47:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1632937640; bh=jEX9WfFfE7uc4opv3Isth3zecI1A32dpxFg6mdU08xM=; h=In-Reply-To:References:Date:From:To:Cc:Subject:From; b=LM1gtvuF6QTPazoRV7AFt66j4gUjzHljkibHjf3/NEsFv2QZO9rjpxZGFe8/KAHD0 riqHZLqqhJBcxYwr/VtdhRf5/H3W3qudXW+X1DfIR0wWVaYYaknxCnJRrYta4OSVFB EN0/wmE5CKyEHSKXmsREeDVezXzvHOuO+0MxFddJ51/+FBzyaDzys0EbVTvyMjn010 TTCf1YJNsh7cmLlhe7AbaDDTsgqQFs1v7bMoshfxq26wI/iUMTWFAPqYCm3slv2Ojr cRSgHKh5aEDvQu4yD/pdxIZtUpJQaaSUypxgrbKJCdMyqAAKZalvvMuKBZT1FaaAcL +kXeAY7LxnvUA== Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailauth.nyi.internal (Postfix) with ESMTP id A0D8C27C0054; Wed, 29 Sep 2021 13:47:18 -0400 (EDT) Received: from imap48 ([10.202.2.98]) by compute6.internal (MEProxy); Wed, 29 Sep 2021 13:47:18 -0400 X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrudekvddgudduhecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefofgggkfgjfhffhffvufgtsehttdertderredtnecuhfhrohhmpedftehn ugihucfnuhhtohhmihhrshhkihdfuceolhhuthhosehkvghrnhgvlhdrohhrgheqnecugg ftrfgrthhtvghrnheptdfhheettddvtedvtedugfeuuefhtddugedvleevleefvdetleff gfefvdekgeefnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homheprghnugihodhmvghsmhhtphgruhhthhhpvghrshhonhgrlhhithihqdduudeiudek heeifedvqddvieefudeiiedtkedqlhhuthhopeepkhgvrhhnvghlrdhorhhgsehlihhnuh igrdhluhhtohdruhhs X-ME-Proxy: Received: by mailuser.nyi.internal (Postfix, from userid 501) id 6E53E21E0063; Wed, 29 Sep 2021 13:47:18 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.5.0-alpha0-1303-gb2406efd75-fm-20210922.002-gb2406efd Mime-Version: 1.0 Message-Id: In-Reply-To: References: <87y27nfjel.ffs@tglx> <87o88jfajo.ffs@tglx> <87k0j6dsdn.ffs@tglx> <87r1d78t2e.ffs@tglx> <75e95acc-6730-ddcf-d722-66e575076256@kernel.org> <877dez8fqu.ffs@tglx> Date: Wed, 29 Sep 2021 10:46:58 -0700 From: "Andy Lutomirski" To: "Tony Luck" , "Thomas Gleixner" Subject: Re: [PATCH 5/8] x86/mmu: Add mm-based PASID refcounting Cc: Fenghua Yu , Dave Jiang , Raj Ashok , "Shankar, Ravi V" , "Peter Zijlstra \(Intel\)" , the arch/x86 maintainers , Linux Kernel Mailing List , Dave Hansen , iommu@lists.linux-foundation.org, Ingo Molnar , Borislav Petkov , Jacob Jun Pan , Josh Poimboeuf X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Wed, Sep 29, 2021, at 10:41 AM, Luck, Tony wrote: > On Wed, Sep 29, 2021 at 07:15:53PM +0200, Thomas Gleixner wrote: >> On Wed, Sep 29 2021 at 09:59, Andy Lutomirski wrote: >> > On 9/29/21 05:28, Thomas Gleixner wrote: >> >> Looking at that patch again, none of this muck in fpu__pasid_write() is >> >> required at all. The whole exception fixup is: >> >> >> >> if (!user_mode(regs)) >> >> return false; >> >> >> >> if (!current->mm->pasid) >> >> return false; >> >> >> >> if (current->pasid_activated) >> >> return false; >> > >> > <-- preemption or BH here: kaboom. >> >> Sigh, this had obviously to run in the early portion of #GP, i.e. before >> enabling interrupts. > > Like this? Obviously with some comment about why this is being done. > > diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c > index a58800973aed..a848a59291e7 100644 > --- a/arch/x86/kernel/traps.c > +++ b/arch/x86/kernel/traps.c > @@ -536,6 +536,12 @@ DEFINE_IDTENTRY_ERRORCODE(exc_general_protection) > unsigned long gp_addr; > int ret; > > + if (user_mode(regs) && current->mm->pasid && !current->pasid_activated) { > + current->pasid_activated = 1; > + wrmsrl(MSR_IA32_PASID, current->mm->pasid | MSR_IA32_PASID_VALID); > + return; > + } > + This could do with a WARN_ON_ONCE(TIF_NEED_LOAD_FPU) imo. Is instrumentation allowed to touch FPU state? > cond_local_irq_enable(regs); > > if (static_cpu_has(X86_FEATURE_UMIP)) { > > -Tony _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu