From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72E17C433F5 for ; Mon, 14 Feb 2022 19:08:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 34D2B10E2A5; Mon, 14 Feb 2022 19:08:24 +0000 (UTC) Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3BEC110E2A5; Mon, 14 Feb 2022 19:08:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1644865703; x=1676401703; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=o399d9ecTHK4e95M+tUkgumsvYPEBP7LORzPvfD9GG0=; b=GVxMqNAtjDwc2eLJ7QAn9iWGZT5IV3IHG7JYK12269gg5979zzgQrDR6 8uJLdU0QhUR8lTEEv0Mq2FJFkeNwDslJeOck4wLMcZYmLqeK5wZzQRfPD mBWaWvYEfDRGXOn4MZqrN8JCEQhp1Rw6thq8BSegk/VrSvBw/ARUwcDRE U=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 14 Feb 2022 11:08:23 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2022 11:08:22 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Mon, 14 Feb 2022 11:08:21 -0800 Received: from [10.111.168.21] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Mon, 14 Feb 2022 11:08:19 -0800 Message-ID: Date: Mon, 14 Feb 2022 11:08:17 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [PATCH v5 4/6] drm/msm/dpu: stop embedding dpu_hw_blk into dpu_hw_intf Content-Language: en-US To: Dmitry Baryshkov , Bjorn Andersson , Rob Clark , Sean Paul References: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> <20220121210618.3482550-5-dmitry.baryshkov@linaro.org> From: Abhinav Kumar In-Reply-To: <20220121210618.3482550-5-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, Stephen Boyd , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 1/21/2022 1:06 PM, Dmitry Baryshkov wrote: > Now as dpu_hw_intf is not hanled by dpu_rm_get_assigned_resources, there > is no point in embedding the (empty) struct dpu_hw_blk into dpu_hw_intf > (and using typecasts between dpu_hw_blk and dpu_hw_intf). Drop it and > use dpu_hw_intf directly. > > Signed-off-by: Dmitry Baryshkov > Reviewed-by: Stephen Boyd Reviewed-by: Abhinav Kumar > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 11 ----------- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 17 +++-------------- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 9 ++++++--- > 3 files changed, 9 insertions(+), 28 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h > index 3568be80dab5..230d122fa43b 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h > @@ -78,7 +78,6 @@ struct dpu_hw_intf_ops { > }; > > struct dpu_hw_intf { > - struct dpu_hw_blk base; > struct dpu_hw_blk_reg_map hw; > > /* intf */ > @@ -90,16 +89,6 @@ struct dpu_hw_intf { > struct dpu_hw_intf_ops ops; > }; > > -/** > - * to_dpu_hw_intf - convert base object dpu_hw_base to container > - * @hw: Pointer to base hardware block > - * return: Pointer to hardware block container > - */ > -static inline struct dpu_hw_intf *to_dpu_hw_intf(struct dpu_hw_blk *hw) > -{ > - return container_of(hw, struct dpu_hw_intf, base); > -} > - > /** > * dpu_hw_intf_init(): Initializes the intf driver for the passed > * interface idx. > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > index 8df21a46308e..96554e962e38 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > @@ -74,14 +74,8 @@ int dpu_rm_destroy(struct dpu_rm *rm) > dpu_hw_ctl_destroy(hw); > } > } > - for (i = 0; i < ARRAY_SIZE(rm->intf_blks); i++) { > - struct dpu_hw_intf *hw; > - > - if (rm->intf_blks[i]) { > - hw = to_dpu_hw_intf(rm->intf_blks[i]); > - dpu_hw_intf_destroy(hw); > - } > - } > + for (i = 0; i < ARRAY_SIZE(rm->hw_intf); i++) > + dpu_hw_intf_destroy(rm->hw_intf[i]); > > return 0; > } > @@ -179,7 +173,7 @@ int dpu_rm_init(struct dpu_rm *rm, > DPU_ERROR("failed intf object creation: err %d\n", rc); > goto fail; > } > - rm->intf_blks[intf->id - INTF_0] = &hw->base; > + rm->hw_intf[intf->id - INTF_0] = hw; > } > > for (i = 0; i < cat->ctl_count; i++) { > @@ -593,8 +587,3 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, > > return num_blks; > } > - > -struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx) > -{ > - return to_dpu_hw_intf(rm->intf_blks[intf_idx - INTF_0]); > -} > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h > index ee50f6651b6e..9b13200a050a 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h > @@ -18,14 +18,14 @@ struct dpu_global_state; > * @pingpong_blks: array of pingpong hardware resources > * @mixer_blks: array of layer mixer hardware resources > * @ctl_blks: array of ctl hardware resources > - * @intf_blks: array of intf hardware resources > + * @hw_intf: array of intf hardware resources > * @dspp_blks: array of dspp hardware resources > */ > struct dpu_rm { > struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0]; > struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0]; > struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0]; > - struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0]; > + struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0]; > struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0]; > struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0]; > }; > @@ -90,7 +90,10 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, > * @rm: DPU Resource Manager handle > * @intf_idx: INTF's index > */ > -struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx); > +static inline struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx) > +{ > + return rm->hw_intf[intf_idx - INTF_0]; > +} > > #endif /* __DPU_RM_H__ */ > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD109C433F5 for ; Mon, 14 Feb 2022 19:45:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229478AbiBNTpQ (ORCPT ); Mon, 14 Feb 2022 14:45:16 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:49402 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229436AbiBNTpQ (ORCPT ); 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Mon, 14 Feb 2022 11:08:21 -0800 Received: from [10.111.168.21] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Mon, 14 Feb 2022 11:08:19 -0800 Message-ID: Date: Mon, 14 Feb 2022 11:08:17 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [PATCH v5 4/6] drm/msm/dpu: stop embedding dpu_hw_blk into dpu_hw_intf Content-Language: en-US To: Dmitry Baryshkov , Bjorn Andersson , Rob Clark , Sean Paul CC: Stephen Boyd , David Airlie , Daniel Vetter , , , References: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> <20220121210618.3482550-5-dmitry.baryshkov@linaro.org> From: Abhinav Kumar In-Reply-To: <20220121210618.3482550-5-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 1/21/2022 1:06 PM, Dmitry Baryshkov wrote: > Now as dpu_hw_intf is not hanled by dpu_rm_get_assigned_resources, there > is no point in embedding the (empty) struct dpu_hw_blk into dpu_hw_intf > (and using typecasts between dpu_hw_blk and dpu_hw_intf). Drop it and > use dpu_hw_intf directly. > > Signed-off-by: Dmitry Baryshkov > Reviewed-by: Stephen Boyd Reviewed-by: Abhinav Kumar > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 11 ----------- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 17 +++-------------- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 9 ++++++--- > 3 files changed, 9 insertions(+), 28 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h > index 3568be80dab5..230d122fa43b 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h > @@ -78,7 +78,6 @@ struct dpu_hw_intf_ops { > }; > > struct dpu_hw_intf { > - struct dpu_hw_blk base; > struct dpu_hw_blk_reg_map hw; > > /* intf */ > @@ -90,16 +89,6 @@ struct dpu_hw_intf { > struct dpu_hw_intf_ops ops; > }; > > -/** > - * to_dpu_hw_intf - convert base object dpu_hw_base to container > - * @hw: Pointer to base hardware block > - * return: Pointer to hardware block container > - */ > -static inline struct dpu_hw_intf *to_dpu_hw_intf(struct dpu_hw_blk *hw) > -{ > - return container_of(hw, struct dpu_hw_intf, base); > -} > - > /** > * dpu_hw_intf_init(): Initializes the intf driver for the passed > * interface idx. > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > index 8df21a46308e..96554e962e38 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > @@ -74,14 +74,8 @@ int dpu_rm_destroy(struct dpu_rm *rm) > dpu_hw_ctl_destroy(hw); > } > } > - for (i = 0; i < ARRAY_SIZE(rm->intf_blks); i++) { > - struct dpu_hw_intf *hw; > - > - if (rm->intf_blks[i]) { > - hw = to_dpu_hw_intf(rm->intf_blks[i]); > - dpu_hw_intf_destroy(hw); > - } > - } > + for (i = 0; i < ARRAY_SIZE(rm->hw_intf); i++) > + dpu_hw_intf_destroy(rm->hw_intf[i]); > > return 0; > } > @@ -179,7 +173,7 @@ int dpu_rm_init(struct dpu_rm *rm, > DPU_ERROR("failed intf object creation: err %d\n", rc); > goto fail; > } > - rm->intf_blks[intf->id - INTF_0] = &hw->base; > + rm->hw_intf[intf->id - INTF_0] = hw; > } > > for (i = 0; i < cat->ctl_count; i++) { > @@ -593,8 +587,3 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, > > return num_blks; > } > - > -struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx) > -{ > - return to_dpu_hw_intf(rm->intf_blks[intf_idx - INTF_0]); > -} > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h > index ee50f6651b6e..9b13200a050a 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h > @@ -18,14 +18,14 @@ struct dpu_global_state; > * @pingpong_blks: array of pingpong hardware resources > * @mixer_blks: array of layer mixer hardware resources > * @ctl_blks: array of ctl hardware resources > - * @intf_blks: array of intf hardware resources > + * @hw_intf: array of intf hardware resources > * @dspp_blks: array of dspp hardware resources > */ > struct dpu_rm { > struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0]; > struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0]; > struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0]; > - struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0]; > + struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0]; > struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0]; > struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0]; > }; > @@ -90,7 +90,10 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, > * @rm: DPU Resource Manager handle > * @intf_idx: INTF's index > */ > -struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx); > +static inline struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx) > +{ > + return rm->hw_intf[intf_idx - INTF_0]; > +} > > #endif /* __DPU_RM_H__ */ >