From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF26FC4338F for ; Thu, 19 Aug 2021 13:42:33 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B47D1610FF for ; Thu, 19 Aug 2021 13:42:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B47D1610FF Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=xen.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.xenproject.org Received: from list by lists.xenproject.org with outflank-mailman.168827.308282 (Exim 4.92) (envelope-from ) id 1mGiJL-0001Km-Uq; Thu, 19 Aug 2021 13:42:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 168827.308282; Thu, 19 Aug 2021 13:42:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1mGiJL-0001Kf-Rf; Thu, 19 Aug 2021 13:42:23 +0000 Received: by outflank-mailman (input) for mailman id 168827; Thu, 19 Aug 2021 13:42:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1mGiJK-0001KZ-Hx for xen-devel@lists.xenproject.org; Thu, 19 Aug 2021 13:42:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1mGiJJ-0000MX-Ng; Thu, 19 Aug 2021 13:42:21 +0000 Received: from [54.239.6.188] (helo=a483e7b01a66.ant.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1mGiJJ-0001ym-HY; Thu, 19 Aug 2021 13:42:21 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To: MIME-Version:Date:Message-ID:From:References:Cc:To:Subject; bh=uN3Yz2JUfasxeZpsVtPb5fk0A7iRyX40aNC0cPU/8aw=; b=vW56ITKEyDNkUahnllML3tsaGr QpX1LhHlGXdq0QbA4VETIzL0sra2ulbWa8WhVucNeh970AwVM2K/aWr4UNVobLN4FuX5JOK7/rO+X eDL4gsRM21k5Bq0m4z9WlRONBXgOvbZoJsKJH8n445IEmuQGSQKy95XpK/jkkmE4eOeA=; Subject: Re: [XEN RFC PATCH 00/40] Add device tree based NUMA support to Arm64 To: Wei Chen , xen-devel@lists.xenproject.org, sstabellini@kernel.org, jbeulich@suse.com Cc: Bertrand.Marquis@arm.com References: <20210811102423.28908-1-wei.chen@arm.com> From: Julien Grall Message-ID: Date: Thu, 19 Aug 2021 14:42:19 +0100 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20210811102423.28908-1-wei.chen@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Hi Wei, On 11/08/2021 11:23, Wei Chen wrote: > Xen memory allocation and scheduler modules are NUMA aware. > But actually, on x86 has implemented the architecture APIs > to support NUMA. Arm was providing a set of fake architecture > APIs to make it compatible with NUMA awared memory allocation > and scheduler. > > Arm system was working well as a single node NUMA system with > these fake APIs, because we didn't have multiple nodes NUMA > system on Arm. But in recent years, more and more Arm devices > support multiple nodes NUMA system. Like TX2, some Hisilicon > chips and the Ampere Altra. All the platforms you mention here are servers (so mainly ACPI). However, this series is adding DT support. Could you outline the long term plan for DT? Is it going to be used on production HW? Cheers, -- Julien Grall