From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Sun, 6 Oct 2019 15:44:30 +0200 Subject: [U-Boot] [PATCH 4/8] ARM: socfpga: arria10: Add generic handoff devicetree include In-Reply-To: <6323f4381558a754bdf790e77ba2003919708137.camel@linux.intel.com> References: <20191004223043.18127-1-dalon.westergreen@linux.intel.com> <20191004223043.18127-5-dalon.westergreen@linux.intel.com> <125a5772-1357-d5ee-c3ed-6e2c859c0015@denx.de> <6323f4381558a754bdf790e77ba2003919708137.camel@linux.intel.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 10/6/19 1:19 AM, Dalon L Westergreen wrote: > On Sat, 2019-10-05 at 01:51 +0200, Marek Vasut wrote: >> On 10/5/19 12:30 AM, Dalon Westergreen wrote: >>> From: Dalon Westergreen >>> Generic handoff devicetree include uses a header generated bythe qts-filter- >>> a10.sh script in mach-socfpga. The scriptcreates the header based on design >>> specific implementationsfor clock and pinmux configurations. >> >> [...] >>> diff --git a/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi >>> b/arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi >> >> [...] >>> - clock_manager at 0xffd04000 {+ clkmgr at 0xffd04000 {+ compatible = >>> "altr,socfpga-a10-clk-init";+ reg = <0xffd04000 0x00000200>;+ >>> reg-names = "soc_clock_manager_OCP_SLV"; u-boot,dm-pre- >>> reloc; mainpll {+ vco0-psrc = >>> ;+ vco1-denom = >>> ;+ vco1-numer = >>> ; >> >> But these bits are board-specific , they shouldn't be in common DT. > > This common dtsi requires that the top level u-boot.dtsi include the board > specific header. The format > and #define names are in fact common. OK, I now see what you're doing here. Can you explain that in a bit more detail in the commit message ? Basically socfpga_board.h is included socfpga_board.dts , and then the preprocessor correctly expands the values from socfpga_board.h in the socfpga_board.dts , so this works for multiple boards too ?