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From: Valentin Schneider <valentin.schneider@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Russell King <linux@arm.linux.org.uk>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Sumit Garg <sumit.garg@linaro.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Andrew Lunn <andrew@lunn.ch>,
	kernel-team@android.com
Subject: Re: [PATCH v2 14/17] arm64: Kill __smp_cross_call and co
Date: Thu, 25 Jun 2020 19:25:56 +0100	[thread overview]
Message-ID: <jhjh7uzgfyj.mognet@arm.com> (raw)
In-Reply-To: <20200624195811.435857-15-maz@kernel.org>


On 24/06/20 20:58, Marc Zyngier wrote:
> @@ -852,8 +841,7 @@ void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
>  #ifdef CONFIG_IRQ_WORK
>  void arch_irq_work_raise(void)
>  {
> -	if (__smp_cross_call)
> -		smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
> +	smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);

AIU the following commit:

  eb631bb5bf5b ("arm64: Support arch_irq_work_raise() via self IPIs")

It seems arm64 hasn't needed that check since

  4b3dc9679cf7 ("arm64: force CONFIG_SMP=y and remove redundant #ifdefs")

Did I get that right?

>  }
>  #endif
>

WARNING: multiple messages have this Message-ID (diff)
From: Valentin Schneider <valentin.schneider@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Sumit Garg <sumit.garg@linaro.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Russell King <linux@arm.linux.org.uk>,
	Jason Cooper <jason@lakedaemon.net>,
	kernel-team@android.com, Andrew Lunn <andrew@lunn.ch>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	linux-kernel@vger.kernel.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 14/17] arm64: Kill __smp_cross_call and co
Date: Thu, 25 Jun 2020 19:25:56 +0100	[thread overview]
Message-ID: <jhjh7uzgfyj.mognet@arm.com> (raw)
In-Reply-To: <20200624195811.435857-15-maz@kernel.org>


On 24/06/20 20:58, Marc Zyngier wrote:
> @@ -852,8 +841,7 @@ void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
>  #ifdef CONFIG_IRQ_WORK
>  void arch_irq_work_raise(void)
>  {
> -	if (__smp_cross_call)
> -		smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
> +	smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);

AIU the following commit:

  eb631bb5bf5b ("arm64: Support arch_irq_work_raise() via self IPIs")

It seems arm64 hasn't needed that check since

  4b3dc9679cf7 ("arm64: force CONFIG_SMP=y and remove redundant #ifdefs")

Did I get that right?

>  }
>  #endif
>

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  reply	other threads:[~2020-06-25 18:26 UTC|newest]

Thread overview: 99+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-24 19:57 [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts Marc Zyngier
2020-06-24 19:57 ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 01/17] genirq: Add fasteoi IPI flow Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 02/17] genirq: Allow interrupts to be excluded from /proc/interrupts Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 03/17] arm64: Allow IPIs to be handled as normal interrupts Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-06-25 18:25     ` Valentin Schneider
2020-07-10 19:58   ` Valentin Schneider
2020-07-10 19:58     ` Valentin Schneider
2020-06-24 19:57 ` [PATCH v2 04/17] ARM: " Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-06-25 18:25     ` Valentin Schneider
2020-06-29  9:37     ` Marc Zyngier
2020-06-29  9:37       ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 05/17] irqchip/gic-v3: Describe the SGI range Marc Zyngier
2020-06-24 19:57   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 06/17] irqchip/gic-v3: Configure SGIs as standard interrupts Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-06-25 18:25     ` Valentin Schneider
2020-06-30 10:15     ` Marc Zyngier
2020-06-30 10:15       ` Marc Zyngier
2020-07-02 13:23       ` Valentin Schneider
2020-07-02 13:23         ` Valentin Schneider
2020-07-02 13:48         ` Marc Zyngier
2020-07-02 13:48           ` Marc Zyngier
2020-07-02 14:24           ` Valentin Schneider
2020-07-02 14:24             ` Valentin Schneider
2020-06-24 19:58 ` [PATCH v2 07/17] irqchip/gic: Atomically update affinity Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-07-01 19:33   ` Sasha Levin
2020-07-01 19:33     ` Sasha Levin
2020-07-10 14:02   ` Sasha Levin
2020-07-10 14:02     ` Sasha Levin
2021-09-09 15:22   ` Geert Uytterhoeven
2021-09-09 15:22     ` Geert Uytterhoeven
2021-09-09 15:37     ` Russell King (Oracle)
2021-09-09 15:37       ` Russell King (Oracle)
2021-09-10 10:22     ` Marc Zyngier
2021-09-10 10:22       ` Marc Zyngier
2021-09-10 13:19       ` Geert Uytterhoeven
2021-09-10 13:19         ` Geert Uytterhoeven
2021-09-11  2:49         ` Magnus Damm
2021-09-11  2:49           ` Magnus Damm
2021-09-11 19:32           ` Marc Zyngier
2021-09-11 19:32             ` Marc Zyngier
2021-09-12  5:40             ` Magnus Damm
2021-09-12  5:40               ` Magnus Damm
2021-09-13  8:05               ` Geert Uytterhoeven
2021-09-13  8:05                 ` Geert Uytterhoeven
2021-09-15  3:28                 ` Magnus Damm
2021-09-15  3:28                   ` Magnus Damm
2021-09-22 13:53     ` [irqchip: irq/irqchip-fixes] irqchip/gic: Work around broken Renesas integration irqchip-bot for Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 08/17] irqchip/gic: Refactor SMP configuration Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 09/17] irqchip/gic: Configure SGIs as standard interrupts Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 10/17] irqchip/gic-common: Don't enable SGIs by default Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 11/17] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 12/17] irqchip/hip04: Configure IPIs " Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 13/17] irqchip/armada-370-xp: " Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 14/17] arm64: Kill __smp_cross_call and co Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider [this message]
2020-06-25 18:25     ` Valentin Schneider
2020-07-02 13:37     ` Marc Zyngier
2020-07-02 13:37       ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 15/17] arm64: Remove custom IRQ stat accounting Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-25 18:26   ` Valentin Schneider
2020-06-25 18:26     ` Valentin Schneider
2020-06-26 11:58     ` Marc Zyngier
2020-06-26 11:58       ` Marc Zyngier
2020-06-26 23:15       ` Valentin Schneider
2020-06-26 23:15         ` Valentin Schneider
2020-06-27 11:42         ` Marc Zyngier
2020-06-27 11:42           ` Marc Zyngier
2020-07-10 19:58   ` Valentin Schneider
2020-07-10 19:58     ` Valentin Schneider
2020-06-24 19:58 ` [PATCH v2 16/17] ARM: Kill __smp_cross_call and co Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 17/17] ARM: Remove custom IRQ stat accounting Marc Zyngier
2020-06-24 19:58   ` Marc Zyngier
2020-06-25 18:24 ` [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts Valentin Schneider
2020-06-25 18:24   ` Valentin Schneider
2020-07-10 19:58   ` Valentin Schneider
2020-07-10 19:58     ` Valentin Schneider
2020-08-11 13:15 ` Sumit Garg
2020-08-11 13:15   ` Sumit Garg
2020-08-11 13:58   ` Marc Zyngier
2020-08-11 13:58     ` Marc Zyngier

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