From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754744AbdFWVrk (ORCPT ); Fri, 23 Jun 2017 17:47:40 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:34994 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754075AbdFWVrf (ORCPT ); Fri, 23 Jun 2017 17:47:35 -0400 Date: Fri, 23 Jun 2017 14:47:34 -0700 (PDT) X-Google-Original-Date: Fri, 23 Jun 2017 14:46:29 PDT (-0700) From: Palmer Dabbelt To: Olof Johansson CC: Wesley Terpstra CC: hch@infradead.org CC: patches@groups.riscv.org CC: linux-arch@vger.kernel.org CC: albert@sifive.com CC: Arnd Bergmann CC: linux-kernel@vger.kernel.org Subject: Re: [patches] Re: [PATCH 01/17] drivers: support PCIe in RISCV In-Reply-To: Message-ID: Mime-Version: 1.0 (MHng) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 07 Jun 2017 10:40:50 PDT (-0700), Olof Johansson wrote: > On Wed, Jun 7, 2017 at 10:09 AM, Wesley Terpstra wrote: >> >> >> On Jun 7, 2017 7:26 AM, "Christoph Hellwig" wrote: >> >> On Tue, Jun 06, 2017 at 03:59:51PM -0700, Palmer Dabbelt wrote: >>> From: "Wesley W. Terpstra" >>> >>> There are RISC-V systems that have been mapped to Xilinx FPGAs that have >>> their PCIe controllers on chip. These build system changes allow RISC-V >>> systems to enable the Xilinx PCIe controller, and to setup PCIe IRQs. >>> >>> Signed-off-by: Palmer Dabbelt >>> --- >>> drivers/pci/Makefile | 1 + >>> drivers/pci/host/Kconfig | 2 +- >>> 2 files changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile >>> index 462c1f5f5546..a29d9ec05d13 100644 >>> --- a/drivers/pci/Makefile >>> +++ b/drivers/pci/Makefile >>> @@ -41,6 +41,7 @@ obj-$(CONFIG_MIPS) += setup-irq.o >>> obj-$(CONFIG_TILE) += setup-irq.o >>> obj-$(CONFIG_SPARC_LEON) += setup-irq.o >>> obj-$(CONFIG_M68K) += setup-irq.o >>> +obj-$(CONFIG_RISCV) += setup-irq.o >> >> Can we do a cleanup here and add a ARCH_USE_GENERIC_PCI_SETUP Kconfig >> symbol that all these architectures can select? >> >> >> That would probably be better. I did not want to touch other arch/ folders >> in our changes. > > I understand that approach when you're doing things in your tree > early, but in this case (and at this phase in submission/merging), > don't be afraid to touch other architectures and refactor/clean up. > > Please do the refactor in a separate preceding patch and submit it > separate/soon instead of keeping it just in the series and bundled > with your addition. That way it can go in when ready even if the rest > of the series is spinning. Makes sense. I've started submitting the various smaller patches so we can get them all in to make our patch set smaller. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Palmer Dabbelt Subject: Re: [patches] Re: [PATCH 01/17] drivers: support PCIe in RISCV Date: Fri, 23 Jun 2017 14:47:34 -0700 (PDT) Message-ID: References: Mime-Version: 1.0 (MHng) Return-path: Received: from mail-pf0-f193.google.com ([209.85.192.193]:33014 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754162AbdFWVrf (ORCPT ); Fri, 23 Jun 2017 17:47:35 -0400 Received: by mail-pf0-f193.google.com with SMTP id w12so9121174pfk.0 for ; Fri, 23 Jun 2017 14:47:35 -0700 (PDT) In-Reply-To: Sender: linux-arch-owner@vger.kernel.org List-ID: To: Olof Johansson Cc: Wesley Terpstra , hch@infradead.org, patches@groups.riscv.org, linux-arch@vger.kernel.org, albert@sifive.com, Arnd Bergmann , linux-kernel@vger.kernel.org On Wed, 07 Jun 2017 10:40:50 PDT (-0700), Olof Johansson wrote: > On Wed, Jun 7, 2017 at 10:09 AM, Wesley Terpstra wrote: >> >> >> On Jun 7, 2017 7:26 AM, "Christoph Hellwig" wrote: >> >> On Tue, Jun 06, 2017 at 03:59:51PM -0700, Palmer Dabbelt wrote: >>> From: "Wesley W. Terpstra" >>> >>> There are RISC-V systems that have been mapped to Xilinx FPGAs that have >>> their PCIe controllers on chip. These build system changes allow RISC-V >>> systems to enable the Xilinx PCIe controller, and to setup PCIe IRQs. >>> >>> Signed-off-by: Palmer Dabbelt >>> --- >>> drivers/pci/Makefile | 1 + >>> drivers/pci/host/Kconfig | 2 +- >>> 2 files changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile >>> index 462c1f5f5546..a29d9ec05d13 100644 >>> --- a/drivers/pci/Makefile >>> +++ b/drivers/pci/Makefile >>> @@ -41,6 +41,7 @@ obj-$(CONFIG_MIPS) += setup-irq.o >>> obj-$(CONFIG_TILE) += setup-irq.o >>> obj-$(CONFIG_SPARC_LEON) += setup-irq.o >>> obj-$(CONFIG_M68K) += setup-irq.o >>> +obj-$(CONFIG_RISCV) += setup-irq.o >> >> Can we do a cleanup here and add a ARCH_USE_GENERIC_PCI_SETUP Kconfig >> symbol that all these architectures can select? >> >> >> That would probably be better. I did not want to touch other arch/ folders >> in our changes. > > I understand that approach when you're doing things in your tree > early, but in this case (and at this phase in submission/merging), > don't be afraid to touch other architectures and refactor/clean up. > > Please do the refactor in a separate preceding patch and submit it > separate/soon instead of keeping it just in the series and bundled > with your addition. That way it can go in when ready even if the rest > of the series is spinning. Makes sense. I've started submitting the various smaller patches so we can get them all in to make our patch set smaller.