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* [PATCH] x86/microcode/AMD: Add support for fam17h microcode loading
@ 2017-11-30 22:46 Tom Lendacky
  2017-11-30 22:52 ` Borislav Petkov
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Tom Lendacky @ 2017-11-30 22:46 UTC (permalink / raw)
  To: x86
  Cc: Thomas Gleixner, Ingo Molnar, Borislav Petkov, linux-kernel,
	H. Peter Anvin

The size for the Microcode Patch Block (MPB) for an AMD family 17h
processor is 3200 bytes.  Add a #define for fam17h so that it does
not default to 2048 bytes and fail a microcode load/update.

Cc: <stable@vger.kernel.org> # 4.1.x
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
---
 arch/x86/kernel/cpu/microcode/amd.c |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index c6daec4..330b846 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -470,6 +470,7 @@ static unsigned int verify_patch_size(u8 family, u32 patch_size,
 #define F14H_MPB_MAX_SIZE 1824
 #define F15H_MPB_MAX_SIZE 4096
 #define F16H_MPB_MAX_SIZE 3458
+#define F17H_MPB_MAX_SIZE 3200
 
 	switch (family) {
 	case 0x14:
@@ -481,6 +482,9 @@ static unsigned int verify_patch_size(u8 family, u32 patch_size,
 	case 0x16:
 		max_size = F16H_MPB_MAX_SIZE;
 		break;
+	case 0x17:
+		max_size = F17H_MPB_MAX_SIZE;
+		break;
 	default:
 		max_size = F1XH_MPB_MAX_SIZE;
 		break;

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH] x86/microcode/AMD: Add support for fam17h microcode loading
  2017-11-30 22:46 [PATCH] x86/microcode/AMD: Add support for fam17h microcode loading Tom Lendacky
@ 2017-11-30 22:52 ` Borislav Petkov
  2017-12-04 22:09 ` [tip:x86/urgent] " tip-bot for Tom Lendacky
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Borislav Petkov @ 2017-11-30 22:52 UTC (permalink / raw)
  To: Tom Lendacky
  Cc: x86, Thomas Gleixner, Ingo Molnar, linux-kernel, H. Peter Anvin

On Thu, Nov 30, 2017 at 04:46:40PM -0600, Tom Lendacky wrote:
> The size for the Microcode Patch Block (MPB) for an AMD family 17h
> processor is 3200 bytes.  Add a #define for fam17h so that it does
> not default to 2048 bytes and fail a microcode load/update.
> 
> Cc: <stable@vger.kernel.org> # 4.1.x
> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
> ---
>  arch/x86/kernel/cpu/microcode/amd.c |    4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
> index c6daec4..330b846 100644
> --- a/arch/x86/kernel/cpu/microcode/amd.c
> +++ b/arch/x86/kernel/cpu/microcode/amd.c
> @@ -470,6 +470,7 @@ static unsigned int verify_patch_size(u8 family, u32 patch_size,
>  #define F14H_MPB_MAX_SIZE 1824
>  #define F15H_MPB_MAX_SIZE 4096
>  #define F16H_MPB_MAX_SIZE 3458
> +#define F17H_MPB_MAX_SIZE 3200
>  
>  	switch (family) {
>  	case 0x14:
> @@ -481,6 +482,9 @@ static unsigned int verify_patch_size(u8 family, u32 patch_size,
>  	case 0x16:
>  		max_size = F16H_MPB_MAX_SIZE;
>  		break;
> +	case 0x17:
> +		max_size = F17H_MPB_MAX_SIZE;
> +		break;
>  	default:
>  		max_size = F1XH_MPB_MAX_SIZE;
>  		break;

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [tip:x86/urgent] x86/microcode/AMD: Add support for fam17h microcode loading
  2017-11-30 22:46 [PATCH] x86/microcode/AMD: Add support for fam17h microcode loading Tom Lendacky
  2017-11-30 22:52 ` Borislav Petkov
@ 2017-12-04 22:09 ` tip-bot for Tom Lendacky
  2017-12-06 11:35 ` tip-bot for Tom Lendacky
  2017-12-10 20:20 ` [PATCH] " Jon Masters
  3 siblings, 0 replies; 5+ messages in thread
From: tip-bot for Tom Lendacky @ 2017-12-04 22:09 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: hpa, bp, tglx, mingo, thomas.lendacky, linux-kernel

Commit-ID:  866a79a1c98c5004a410122b06f808152f2fe53c
Gitweb:     https://git.kernel.org/tip/866a79a1c98c5004a410122b06f808152f2fe53c
Author:     Tom Lendacky <thomas.lendacky@amd.com>
AuthorDate: Thu, 30 Nov 2017 16:46:40 -0600
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 4 Dec 2017 23:03:29 +0100

x86/microcode/AMD: Add support for fam17h microcode loading

The size for the Microcode Patch Block (MPB) for an AMD family 17h
processor is 3200 bytes.  Add a #define for fam17h so that it does
not default to 2048 bytes and fail a microcode load/update.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@alien8.de>
Link: https://lkml.kernel.org/r/20171130224640.15391.40247.stgit@tlendack-t1.amdoffice.net

---
 arch/x86/kernel/cpu/microcode/amd.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index c6daec4..330b846 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -470,6 +470,7 @@ static unsigned int verify_patch_size(u8 family, u32 patch_size,
 #define F14H_MPB_MAX_SIZE 1824
 #define F15H_MPB_MAX_SIZE 4096
 #define F16H_MPB_MAX_SIZE 3458
+#define F17H_MPB_MAX_SIZE 3200
 
 	switch (family) {
 	case 0x14:
@@ -481,6 +482,9 @@ static unsigned int verify_patch_size(u8 family, u32 patch_size,
 	case 0x16:
 		max_size = F16H_MPB_MAX_SIZE;
 		break;
+	case 0x17:
+		max_size = F17H_MPB_MAX_SIZE;
+		break;
 	default:
 		max_size = F1XH_MPB_MAX_SIZE;
 		break;

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [tip:x86/urgent] x86/microcode/AMD: Add support for fam17h microcode loading
  2017-11-30 22:46 [PATCH] x86/microcode/AMD: Add support for fam17h microcode loading Tom Lendacky
  2017-11-30 22:52 ` Borislav Petkov
  2017-12-04 22:09 ` [tip:x86/urgent] " tip-bot for Tom Lendacky
@ 2017-12-06 11:35 ` tip-bot for Tom Lendacky
  2017-12-10 20:20 ` [PATCH] " Jon Masters
  3 siblings, 0 replies; 5+ messages in thread
From: tip-bot for Tom Lendacky @ 2017-12-06 11:35 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: mingo, tglx, bp, thomas.lendacky, linux-kernel, hpa

Commit-ID:  f4e9b7af0cd58dd039a0fb2cd67d57cea4889abf
Gitweb:     https://git.kernel.org/tip/f4e9b7af0cd58dd039a0fb2cd67d57cea4889abf
Author:     Tom Lendacky <thomas.lendacky@amd.com>
AuthorDate: Thu, 30 Nov 2017 16:46:40 -0600
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 6 Dec 2017 12:27:24 +0100

x86/microcode/AMD: Add support for fam17h microcode loading

The size for the Microcode Patch Block (MPB) for an AMD family 17h
processor is 3200 bytes.  Add a #define for fam17h so that it does
not default to 2048 bytes and fail a microcode load/update.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@alien8.de>
Link: https://lkml.kernel.org/r/20171130224640.15391.40247.stgit@tlendack-t1.amdoffice.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/kernel/cpu/microcode/amd.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index c6daec4..330b846 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -470,6 +470,7 @@ static unsigned int verify_patch_size(u8 family, u32 patch_size,
 #define F14H_MPB_MAX_SIZE 1824
 #define F15H_MPB_MAX_SIZE 4096
 #define F16H_MPB_MAX_SIZE 3458
+#define F17H_MPB_MAX_SIZE 3200
 
 	switch (family) {
 	case 0x14:
@@ -481,6 +482,9 @@ static unsigned int verify_patch_size(u8 family, u32 patch_size,
 	case 0x16:
 		max_size = F16H_MPB_MAX_SIZE;
 		break;
+	case 0x17:
+		max_size = F17H_MPB_MAX_SIZE;
+		break;
 	default:
 		max_size = F1XH_MPB_MAX_SIZE;
 		break;

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH] x86/microcode/AMD: Add support for fam17h microcode loading
  2017-11-30 22:46 [PATCH] x86/microcode/AMD: Add support for fam17h microcode loading Tom Lendacky
                   ` (2 preceding siblings ...)
  2017-12-06 11:35 ` tip-bot for Tom Lendacky
@ 2017-12-10 20:20 ` Jon Masters
  3 siblings, 0 replies; 5+ messages in thread
From: Jon Masters @ 2017-12-10 20:20 UTC (permalink / raw)
  To: Tom Lendacky, x86
  Cc: Thomas Gleixner, Ingo Molnar, Borislav Petkov, linux-kernel,
	H. Peter Anvin

On 11/30/2017 05:46 PM, Tom Lendacky wrote:
> The size for the Microcode Patch Block (MPB) for an AMD family 17h
> processor is 3200 bytes.  Add a #define for fam17h so that it does
> not default to 2048 bytes and fail a microcode load/update.
> 
> Cc: <stable@vger.kernel.org> # 4.1.x
> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>

Tested-by: Jon Masters <jcm@redhat.com>

-- 
Computer Architect | Sent from my Fedora powered laptop

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-12-10 20:20 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-11-30 22:46 [PATCH] x86/microcode/AMD: Add support for fam17h microcode loading Tom Lendacky
2017-11-30 22:52 ` Borislav Petkov
2017-12-04 22:09 ` [tip:x86/urgent] " tip-bot for Tom Lendacky
2017-12-06 11:35 ` tip-bot for Tom Lendacky
2017-12-10 20:20 ` [PATCH] " Jon Masters

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