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From: tip-bot for Aravind Gopalakrishnan <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: tglx@linutronix.de, Aravind.Gopalakrishnan@amd.com,
	linux-edac@vger.kernel.org, bp@suse.de,
	linux-kernel@vger.kernel.org, torvalds@linux-foundation.org,
	hpa@zytor.com, bp@alien8.de, tony.luck@intel.com,
	peterz@infradead.org, mingo@kernel.org
Subject: [tip:ras/core] x86/mce: Fix order of AMD MCE init function call
Date: Mon, 1 Feb 2016 03:40:28 -0800	[thread overview]
Message-ID: <tip-bfbe0eeb769e2aff2cb1fc6845c4e4b7eac40bb3@git.kernel.org> (raw)
In-Reply-To: <1453750913-4781-4-git-send-email-bp@alien8.de>

Commit-ID:  bfbe0eeb769e2aff2cb1fc6845c4e4b7eac40bb3
Gitweb:     http://git.kernel.org/tip/bfbe0eeb769e2aff2cb1fc6845c4e4b7eac40bb3
Author:     Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
AuthorDate: Mon, 25 Jan 2016 20:41:48 +0100
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Mon, 1 Feb 2016 10:53:55 +0100

x86/mce: Fix order of AMD MCE init function call

In mce_amd_feature_init() we take decisions based on mce_flags
being set or not. So the feature detection using CPUID should
naturally be ordered before we call mce_amd_feature_init().

Fix that here.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1453750913-4781-4-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index a006f4c..b718080 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1617,10 +1617,10 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 	case X86_VENDOR_AMD: {
 		u32 ebx = cpuid_ebx(0x80000007);
 
-		mce_amd_feature_init(c);
 		mce_flags.overflow_recov = !!(ebx & BIT(0));
 		mce_flags.succor	 = !!(ebx & BIT(1));
 		mce_flags.smca		 = !!(ebx & BIT(3));
+		mce_amd_feature_init(c);
 
 		break;
 		}

  reply	other threads:[~2016-02-01 11:41 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-25 19:41 [PATCH 0/8] tip-queue 2016-01-25 Borislav Petkov
2016-01-25 19:41 ` [PATCH 1/8] x86/traps.c: Refactor preemption and interrupt flag handling Borislav Petkov
2016-02-01 11:39   ` [tip:x86/asm] x86/entry/traps: " tip-bot for Alexander Kuleshov
2016-01-25 19:41 ` [PATCH 2/8] x86/cpufeature: Use enum cpuid_leafs instead of magic numbers Borislav Petkov
2016-02-01 11:40   ` [tip:x86/cpu] " tip-bot for Huaitong Han
2016-01-25 19:41 ` [PATCH 3/8] x86/mce: Fix order of AMD MCE init function call Borislav Petkov
2016-02-01 11:40   ` tip-bot for Aravind Gopalakrishnan [this message]
2016-01-25 19:41 ` [PATCH 4/8] x86/mce/AMD: Do not perform shared bank check for future processors Borislav Petkov
2016-02-01 11:40   ` [tip:ras/core] " tip-bot for Aravind Gopalakrishnan
2016-01-25 19:41 ` [PATCH 5/8] x86/mce/AMD: Reduce number of blocks scanned per bank Borislav Petkov
2016-02-01 11:41   ` [tip:ras/core] " tip-bot for Aravind Gopalakrishnan
2016-01-25 19:41 ` [PATCH 6/8] x86/mce/AMD: Fix LVT offset configuration for thresholding Borislav Petkov
2016-02-01 11:41   ` [tip:ras/core] " tip-bot for Aravind Gopalakrishnan
2016-01-25 19:41 ` [PATCH 7/8] x86/mce/AMD: Carve out threshold block preparation Borislav Petkov
2016-02-01 11:41   ` [tip:ras/core] " tip-bot for Borislav Petkov
2016-01-25 19:41 ` [PATCH 8/8] x86/mce/AMD: Set MCAX Enable bit Borislav Petkov
2016-02-01 11:42   ` [tip:ras/core] " tip-bot for Aravind Gopalakrishnan

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