From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Nikolai Zhubr <zhubr.2@gmail.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>
Cc: Arnd Bergmann <arnd@kernel.org>,
x86@kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [RESEND][PATCH v2 0/2] x86/PCI: SiS PIRQ router updates
Date: Thu, 31 Mar 2022 08:10:35 +0100 (BST) [thread overview]
Message-ID: <alpine.DEB.2.21.2203301608140.22465@angie.orcam.me.uk> (raw)
Hi,
This series was dropped from x86/irq due to a bug in a follow-up patch,
so resending verbatim after re-verification.
Nikolai has observed the trigger mode not being fixed up once it has been
incorrectly set by the BIOS for PCI devices, causing all kinds of usual
issues. As it turns out we don't have a PIRQ router defined for the
SiS85C497 southbridge, which Nikolai's system uses, and which is different
from the SiS85C503 southbridge we have support for.
As we use the generic `sis' infix (capitalised or not) for the SiS85C503
southbridge I have prepared this small patch series to first make the
existing SiS program entities use a more specific `sis503' infix, and then
provide a suitable PIRQ router for the SiS85C497 device.
See individual change descriptions for further details.
Please apply.
Maciej
next reply other threads:[~2022-03-31 7:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-31 7:10 Maciej W. Rozycki [this message]
2022-03-31 7:10 ` [RESEND][PATCH v2 1/2] x86/PCI: Disambiguate SiS85C503 PIRQ router code entities Maciej W. Rozycki
2022-04-10 10:54 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
2022-03-31 7:10 ` [RESEND][PATCH v2 2/2] x86/PCI: Add support for the SiS85C497 PIRQ router Maciej W. Rozycki
2022-04-10 10:54 ` [tip: x86/irq] " tip-bot2 for Maciej W. Rozycki
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