From mboxrd@z Thu Jan 1 00:00:00 1970 From: Russell King - ARM Linux Subject: Re: [PATCH 6/9] drm: bridge/dw_hdmi: adjust pixel clock values in N calculation Date: Sat, 5 Sep 2015 09:31:08 +0100 Message-ID: <20150905083107.GK21084@n2100.arm.linux.org.uk> References: <20150808160936.GN7557@n2100.arm.linux.org.uk> <20150904212401.GI21084@n2100.arm.linux.org.uk> <20150905002733.GJ21084@n2100.arm.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Doug Anderson Cc: Fabio Estevam , alsa-devel@alsa-project.org, "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Jaroslav Kysela , "open list:ARM/Rockchip SoC..." , Mark Brown , Yakir Yang , Andy Yan , "linux-arm-kernel@lists.infradead.org" List-Id: alsa-devel@alsa-project.org T24gRnJpLCBTZXAgMDQsIDIwMTUgYXQgMDc6MDM6MTFQTSAtMDcwMCwgRG91ZyBBbmRlcnNvbiB3 cm90ZToKPiBBS0E6IGp1c3QgcmVwbGFjZSB5b3VyIGVudGlyZSAiY29tcHV0ZV9uIiBmdW5jdGlv biB3aXRoOgo+IAo+IHJldHVybiAoMTI4ICogZnJlcSkgLyAxMDAwOwo+IAo+IC4uLmFuZCBpdCdz IDEwMCUgc2ltcGxlciBfYW5kXyBnZXRzIHlvdSBhIChtYXJnaW5hbGx5KSBiZXR0ZXIgcmF0ZQo+ IChhc3N1bWluZyB5b3UgcmVhbGx5IGhhdmUgMjIuMTc1MDAwKS4gIElmIGl0IHdhcyBqdXN0IGFi b3V0IGEKPiAzMjAwMC4yMjIgdnMgMzIwMDAgSSdkIG5vdCBiZSBzYXlpbmcgYW55dGhpbmcgcmln aHQgbm93LiAgSXQncyBhYm91dAo+IGFkZGluZyBjb21wbGV4aXR5LgoKTm8uICBJdCBkb2Vzbid0 IHdvcmsgZm9yIGFsbCBjYXNlcy4gIERvIHRoZSBjYWxjdWxhdGlvbnMgZm9yIGV2ZXJ5CnNhbXBs ZSByYXRlIGluIHRob3NlIHRhYmxlcyBpbiB0aGUgSERNSSBzcGVjLCBhbmQgeW91J2xsIGZpbmQg b3V0CndoeS4KCi0tIApGVFRDIGJyb2FkYmFuZCBmb3IgMC44bWlsZSBsaW5lOiBjdXJyZW50bHkg YXQgOS42TWJwcyBkb3duIDQwMGticHMgdXAKYWNjb3JkaW5nIHRvIHNwZWVkdGVzdC5uZXQuCl9f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBt YWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMu ZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==