From mboxrd@z Thu Jan 1 00:00:00 1970 From: Russell King - ARM Linux Subject: Re: [PATCH 6/9] drm: bridge/dw_hdmi: adjust pixel clock values in N calculation Date: Sat, 5 Sep 2015 09:34:22 +0100 Message-ID: <20150905083422.GL21084@n2100.arm.linux.org.uk> References: <20150808160936.GN7557@n2100.arm.linux.org.uk> <20150904212401.GI21084@n2100.arm.linux.org.uk> <20150905002733.GJ21084@n2100.arm.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Doug Anderson Cc: Fabio Estevam , alsa-devel@alsa-project.org, "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Jaroslav Kysela , "open list:ARM/Rockchip SoC..." , Mark Brown , Yakir Yang , Andy Yan , "linux-arm-kernel@lists.infradead.org" List-Id: alsa-devel@alsa-project.org T24gRnJpLCBTZXAgMDQsIDIwMTUgYXQgMDc6MDM6MTFQTSAtMDcwMCwgRG91ZyBBbmRlcnNvbiB3 cm90ZToKPiBUaGVuIHBlcmhhcHMgeW91IHNob3VsZG4ndCBiZSB1c2luZyBhIHN3aXRjaCBzdGF0 ZW1lbnQuICBZb3Ugd29uJ3QKPiBjYXRjaCBhbGwgdmFsdWVzIHRoYXQgYXJlIHdpdGhpbiAuMDUl IG9mICgyNS4yIC8gMS4wMDEpLgoKTm8uCgpUaGUgY2xvY2sgcmF0ZXMgeW91IGdldCB1bHRpbWF0 ZWx5IGNvbWUgZnJvbSB0aGUgRURJRCB2aWEgZWl0aGVyIHRoZQpkZXRhaWxlZCB0aW1pbmcgbW9k ZXMgb3IgZnJvbSB0aGUgQ0VBIG1vZGUgSURzLCB3aGljaCBhcmUgdGhlbiBsb29rZWQKdXAgaW4g dGFibGVzIGluIHRoZSBEUk0gRURJRCBwYXJzaW5nIGNvZGUuCgpFaXRoZXIgd2F5LCB5b3Ugd2ls bCBlbmQgdXAgd2l0aCAyNTE3NSBhbmQgbm90IDI1MTcwIG9yIHNvbWV0aGluZwpzdHJhbmdlIGJh c2VkIG9uIHdoYXQgdGhlIHBsYXRmb3JtIGRvZXMuCgotLSAKRlRUQyBicm9hZGJhbmQgZm9yIDAu OG1pbGUgbGluZTogY3VycmVudGx5IGF0IDkuNk1icHMgZG93biA0MDBrYnBzIHVwCmFjY29yZGlu ZyB0byBzcGVlZHRlc3QubmV0LgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVz a3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2Ry aS1kZXZlbAo=