From: Cezary Rojewski <cezary.rojewski@intel.com>
To: alsa-devel@alsa-project.org
Cc: pierre-louis.bossart@linux.intel.com,
Cezary Rojewski <cezary.rojewski@intel.com>,
lgirdwood@gmail.com, tiwai@suse.com, vkoul@kernel.org,
broonie@kernel.org
Subject: [PATCH 3/7] ASoC: Intel: Skylake: Enable codec wakeup during chip init
Date: Thu, 5 Mar 2020 15:53:10 +0100 [thread overview]
Message-ID: <20200305145314.32579-4-cezary.rojewski@intel.com> (raw)
In-Reply-To: <20200305145314.32579-1-cezary.rojewski@intel.com>
Follow the recommendation set by hda_intel.c and enable HDMI/DP codec
wakeup during bus initialization procedure. Disable wakeup once init
completes.
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
sound/soc/intel/skylake/skl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c
index 4827fe6bc1cb..e2e531c96dd1 100644
--- a/sound/soc/intel/skylake/skl.c
+++ b/sound/soc/intel/skylake/skl.c
@@ -130,6 +130,7 @@ static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
struct hdac_ext_link *hlink;
int ret;
+ snd_hdac_set_codec_wakeup(bus, true);
skl_enable_miscbdcge(bus->dev, false);
ret = snd_hdac_bus_init_chip(bus, full_reset);
@@ -138,6 +139,7 @@ static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
skl_enable_miscbdcge(bus->dev, true);
+ snd_hdac_set_codec_wakeup(bus, false);
return ret;
}
--
2.17.1
next prev parent reply other threads:[~2020-03-05 14:55 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-05 14:53 [PATCH 0/7] ASoC: Intel: Skylake: Fix HDaudio and Dmic Cezary Rojewski
2020-03-05 14:53 ` [PATCH 1/7] ASoC: Intel: Skylake: Remove superfluous chip initialization Cezary Rojewski
2020-03-06 20:52 ` Pierre-Louis Bossart
2020-03-09 13:57 ` Cezary Rojewski
2020-03-09 16:48 ` Pierre-Louis Bossart
2020-03-09 17:43 ` Cezary Rojewski
2020-03-09 18:41 ` Pierre-Louis Bossart
2020-03-10 17:45 ` Applied "ASoC: Intel: Skylake: Remove superfluous chip initialization" to the asoc tree Mark Brown
2020-03-05 14:53 ` [PATCH 2/7] ASoC: Intel: Skylake: Select hda configuration permissively Cezary Rojewski
2020-03-06 20:57 ` Pierre-Louis Bossart
2020-03-09 13:47 ` Cezary Rojewski
2020-03-09 17:03 ` Pierre-Louis Bossart
2020-03-10 9:30 ` Cezary Rojewski
2020-03-10 17:45 ` Applied "ASoC: Intel: Skylake: Select hda configuration permissively" to the asoc tree Mark Brown
2020-03-05 14:53 ` Cezary Rojewski [this message]
2020-03-10 17:44 ` Applied "ASoC: Intel: Skylake: Enable codec wakeup during chip init" " Mark Brown
2020-03-05 14:53 ` [PATCH 4/7] ASoC: Intel: Skylake: Shield against no-NHLT configurations Cezary Rojewski
2020-03-06 21:03 ` Pierre-Louis Bossart
2020-03-09 13:03 ` Cezary Rojewski
2020-03-09 17:01 ` Pierre-Louis Bossart
2020-03-09 17:38 ` Cezary Rojewski
2020-03-09 18:40 ` Pierre-Louis Bossart
2020-03-10 17:44 ` Applied "ASoC: Intel: Skylake: Shield against no-NHLT configurations" to the asoc tree Mark Brown
2020-03-05 14:53 ` [PATCH 5/7] ASoC: Intel: skl_hda_dsp: Enable Dmic configuration Cezary Rojewski
2020-03-06 14:46 ` Kai Vehmanen
2020-03-06 15:49 ` Pierre-Louis Bossart
2020-03-06 19:05 ` Cezary Rojewski
2020-03-06 19:49 ` Pierre-Louis Bossart
2020-03-06 19:58 ` Cezary Rojewski
2020-03-05 14:53 ` [PATCH 6/7] ASoC: Intel: Allow for ROM init retry on CNL platforms Cezary Rojewski
2020-03-10 17:44 ` Applied "ASoC: Intel: Allow for ROM init retry on CNL platforms" to the asoc tree Mark Brown
2020-03-05 14:53 ` [PATCH 7/7] ASoC: Intel: Skylake: Await purge request ack on CNL Cezary Rojewski
2020-03-10 17:44 ` Applied "ASoC: Intel: Skylake: Await purge request ack on CNL" to the asoc tree Mark Brown
2020-03-06 20:48 ` [PATCH 0/7] ASoC: Intel: Skylake: Fix HDaudio and Dmic Pierre-Louis Bossart
2020-03-09 11:38 ` Mark Brown
2020-03-09 14:02 ` Cezary Rojewski
2020-03-09 16:54 ` Mark Brown
2020-03-09 17:48 ` Cezary Rojewski
2020-03-09 17:52 ` Mark Brown
2020-03-10 16:03 ` Pierre-Louis Bossart
[not found] ` <2dc38392-760b-a5fc-fa00-98530729f2d3@intel.com>
2020-03-11 16:56 ` Mark Brown
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