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[216.228.112.21]) by smtp.gmail.com with ESMTPSA id f18sm15347558pgv.84.2020.08.01.23.44.02 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 01 Aug 2020 23:44:02 -0700 (PDT) Date: Sat, 1 Aug 2020 23:43:52 -0700 From: Nicolin Chen To: Shengjiu Wang Subject: Re: [PATCH v2] ASoC: fsl-asoc-card: Remove fsl_asoc_card_set_bias_level function Message-ID: <20200802064351.GA24213@Asurada-Nvidia> References: <1596102422-14010-1-git-send-email-shengjiu.wang@nxp.com> <20200801075954.GA19629@Asurada-Nvidia> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Cc: Linux-ALSA , Timur Tabi , Xiubo Li , Fabio Estevam , Shengjiu Wang , Takashi Iwai , Liam Girdwood , Mark Brown , linuxppc-dev@lists.ozlabs.org, linux-kernel X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Sun, Aug 02, 2020 at 10:22:35AM +0800, Shengjiu Wang wrote: > > > + /* Specific configuration for PLL */ > > > + if (codec_priv->pll_id && codec_priv->fll_id) { > > > + if (priv->sample_format == SNDRV_PCM_FORMAT_S24_LE) > > > + pll_out = priv->sample_rate * 384; > > > + else > > > + pll_out = priv->sample_rate * 256; > > > + > > > + ret = snd_soc_dai_set_pll(asoc_rtd_to_codec(rtd, 0), > > > + codec_priv->pll_id, > > > + codec_priv->mclk_id, > > > + codec_priv->mclk_freq, pll_out); > > > + if (ret) { > > > + dev_err(dev, "failed to start FLL: %d\n", ret); > > > + goto out; > > > + } > > > + > > > + ret = snd_soc_dai_set_sysclk(asoc_rtd_to_codec(rtd, 0), > > > + codec_priv->fll_id, > > > + pll_out, SND_SOC_CLOCK_IN); > > > > Just came into my mind: do we need some protection here to prevent > > PLL/SYSCLK reconfiguration if TX/RX end up with different values? > > > Sorry, not really catching your point. could you please elaborate? > Why do TX/RX end up with different values? If TX and RX run concurrently but in different sample rates or sample formats, pll_out would be overwritten to PLL/SYSCLK? I remember imx-wm8962 uses SSI, having symmetric flags for rates/ channels/samplebits, but fsl-asoc-card might have (or will have) other use case. If all existing combinations don't have any problem, we can add a protection later when we need.