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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Mark Brown <broonie@kernel.org>, Takashi Iwai <tiwai@suse.com>,
	Jaroslav Kysela <perex@perex.cz>,
	Liam Girdwood <lgirdwood@gmail.com>, Agneli <poczt@protonmail.ch>
Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
	Arnd Bergmann <arnd@arndb.de>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-tegra@vger.kernel.org
Subject: [PATCH v4 15/22] drm/tegra: hdmi: Register audio CODEC on Tegra20
Date: Sat,  4 Dec 2021 17:37:18 +0300	[thread overview]
Message-ID: <20211204143725.31646-16-digetx@gmail.com> (raw)
In-Reply-To: <20211204143725.31646-1-digetx@gmail.com>

Tegra20 SoC supports only S/PDIF source for HDMI audio. Register ASoC HDMI
S/PDIF CODEC for Tegra20, it will be linked with the S/PDIF CPU DAI.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/gpu/drm/tegra/Kconfig |   3 +
 drivers/gpu/drm/tegra/hdmi.c  | 153 +++++++++++++++++++++++++++++++---
 2 files changed, 145 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig
index 32fe64553d2e..40f0d14cb240 100644
--- a/drivers/gpu/drm/tegra/Kconfig
+++ b/drivers/gpu/drm/tegra/Kconfig
@@ -13,6 +13,9 @@ config DRM_TEGRA_ORIG
 	select INTERCONNECT
 	select IOMMU_IOVA
 	select CEC_CORE if CEC_NOTIFIER
+	select SND_SIMPLE_CARD if SND_SOC_TEGRA20_SPDIF
+	select SND_SOC_HDMI_CODEC if SND_SOC_TEGRA20_SPDIF
+	select SND_AUDIO_GRAPH_CARD if SND_SOC_TEGRA20_SPDIF
 	help
 	  Choose this option if you have an NVIDIA Tegra SoC.
 
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index cc42476fd023..5353f83cbee8 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -18,6 +18,8 @@
 
 #include <soc/tegra/common.h>
 
+#include <sound/hdmi-codec.h>
+
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_crtc.h>
 #include <drm/drm_debugfs.h>
@@ -81,6 +83,9 @@ struct tegra_hdmi {
 	bool dvi;
 
 	struct drm_info_list *debugfs_files;
+
+	struct platform_device *audio_pdev;
+	struct mutex audio_lock;
 };
 
 static inline struct tegra_hdmi *
@@ -363,6 +368,18 @@ static const struct tmds_config tegra124_tmds_config[] = {
 	},
 };
 
+static void tegra_hdmi_audio_lock(struct tegra_hdmi *hdmi)
+{
+	mutex_lock(&hdmi->audio_lock);
+	disable_irq(hdmi->irq);
+}
+
+static void tegra_hdmi_audio_unlock(struct tegra_hdmi *hdmi)
+{
+	enable_irq(hdmi->irq);
+	mutex_unlock(&hdmi->audio_lock);
+}
+
 static int
 tegra_hdmi_get_audio_config(unsigned int audio_freq, unsigned int pix_clock,
 			    struct tegra_hdmi_audio_config *config)
@@ -832,6 +849,23 @@ static void tegra_hdmi_setup_tmds(struct tegra_hdmi *hdmi,
 				  HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT);
 }
 
+static int tegra_hdmi_reconfigure_audio(struct tegra_hdmi *hdmi)
+{
+	int err;
+
+	err = tegra_hdmi_setup_audio(hdmi);
+	if (err < 0) {
+		tegra_hdmi_disable_audio_infoframe(hdmi);
+		tegra_hdmi_disable_audio(hdmi);
+	} else {
+		tegra_hdmi_setup_audio_infoframe(hdmi);
+		tegra_hdmi_enable_audio_infoframe(hdmi);
+		tegra_hdmi_enable_audio(hdmi);
+	}
+
+	return err;
+}
+
 static bool tegra_output_is_hdmi(struct tegra_output *output)
 {
 	struct edid *edid;
@@ -1138,6 +1172,8 @@ static void tegra_hdmi_encoder_disable(struct drm_encoder *encoder)
 	u32 value;
 	int err;
 
+	tegra_hdmi_audio_lock(hdmi);
+
 	/*
 	 * The following accesses registers of the display controller, so make
 	 * sure it's only executed when the output is attached to one.
@@ -1162,6 +1198,10 @@ static void tegra_hdmi_encoder_disable(struct drm_encoder *encoder)
 	tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_INT_ENABLE);
 	tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_INT_MASK);
 
+	hdmi->pixel_clock = 0;
+
+	tegra_hdmi_audio_unlock(hdmi);
+
 	err = host1x_client_suspend(&hdmi->client);
 	if (err < 0)
 		dev_err(hdmi->dev, "failed to suspend: %d\n", err);
@@ -1185,6 +1225,8 @@ static void tegra_hdmi_encoder_enable(struct drm_encoder *encoder)
 		return;
 	}
 
+	tegra_hdmi_audio_lock(hdmi);
+
 	/*
 	 * Enable and unmask the HDA codec SCRATCH0 register interrupt. This
 	 * is used for interoperability between the HDA codec driver and the
@@ -1390,6 +1432,8 @@ static void tegra_hdmi_encoder_enable(struct drm_encoder *encoder)
 	}
 
 	/* TODO: add HDCP support */
+
+	tegra_hdmi_audio_unlock(hdmi);
 }
 
 static int
@@ -1419,6 +1463,91 @@ static const struct drm_encoder_helper_funcs tegra_hdmi_encoder_helper_funcs = {
 	.atomic_check = tegra_hdmi_encoder_atomic_check,
 };
 
+static int tegra_hdmi_hw_params(struct device *dev, void *data,
+				struct hdmi_codec_daifmt *fmt,
+				struct hdmi_codec_params *hparms)
+{
+	struct tegra_hdmi *hdmi = data;
+	int ret = 0;
+
+	tegra_hdmi_audio_lock(hdmi);
+
+	hdmi->format.sample_rate = hparms->sample_rate;
+	hdmi->format.channels = hparms->channels;
+
+	if (hdmi->pixel_clock && !hdmi->dvi)
+		ret = tegra_hdmi_reconfigure_audio(hdmi);
+
+	tegra_hdmi_audio_unlock(hdmi);
+
+	return ret;
+}
+
+static int tegra_hdmi_audio_startup(struct device *dev, void *data)
+{
+	struct tegra_hdmi *hdmi = data;
+	int ret;
+
+	ret = host1x_client_resume(&hdmi->client);
+	if (ret < 0)
+		dev_err(hdmi->dev, "failed to resume: %d\n", ret);
+
+	return ret;
+}
+
+static void tegra_hdmi_audio_shutdown(struct device *dev, void *data)
+{
+	struct tegra_hdmi *hdmi = data;
+	int ret;
+
+	tegra_hdmi_audio_lock(hdmi);
+
+	hdmi->format.sample_rate = 0;
+	hdmi->format.channels = 0;
+
+	tegra_hdmi_audio_unlock(hdmi);
+
+	ret = host1x_client_suspend(&hdmi->client);
+	if (ret < 0)
+		dev_err(hdmi->dev, "failed to suspend: %d\n", ret);
+}
+
+static const struct hdmi_codec_ops tegra_hdmi_codec_ops = {
+	.hw_params = tegra_hdmi_hw_params,
+	.audio_startup = tegra_hdmi_audio_startup,
+	.audio_shutdown = tegra_hdmi_audio_shutdown,
+};
+
+static int tegra_hdmi_codec_register(struct tegra_hdmi *hdmi)
+{
+	struct hdmi_codec_pdata codec_data = {};
+
+	if (hdmi->config->has_hda)
+		return 0;
+
+	codec_data.ops = &tegra_hdmi_codec_ops;
+	codec_data.data = hdmi;
+	codec_data.spdif = 1;
+
+	hdmi->audio_pdev = platform_device_register_data(hdmi->dev,
+							 HDMI_CODEC_DRV_NAME,
+							 PLATFORM_DEVID_AUTO,
+							 &codec_data,
+							 sizeof(codec_data));
+	if (IS_ERR(hdmi->audio_pdev))
+		return PTR_ERR(hdmi->audio_pdev);
+
+	hdmi->format.channels = 2;
+
+	return 0;
+}
+
+static void tegra_hdmi_codec_unregister(struct tegra_hdmi *hdmi)
+{
+	if (hdmi->audio_pdev)
+		platform_device_unregister(hdmi->audio_pdev);
+}
+
 static int tegra_hdmi_init(struct host1x_client *client)
 {
 	struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
@@ -1471,8 +1600,16 @@ static int tegra_hdmi_init(struct host1x_client *client)
 		goto disable_pll;
 	}
 
+	err = tegra_hdmi_codec_register(hdmi);
+	if (err < 0) {
+		dev_err(hdmi->dev, "failed to register audio codec: %d\n", err);
+		goto disable_vdd;
+	}
+
 	return 0;
 
+disable_vdd:
+	regulator_disable(hdmi->vdd);
 disable_pll:
 	regulator_disable(hdmi->pll);
 disable_hdmi:
@@ -1487,6 +1624,8 @@ static int tegra_hdmi_exit(struct host1x_client *client)
 {
 	struct tegra_hdmi *hdmi = host1x_client_to_hdmi(client);
 
+	tegra_hdmi_codec_unregister(hdmi);
+
 	tegra_output_exit(&hdmi->output);
 
 	regulator_disable(hdmi->vdd);
@@ -1611,7 +1750,6 @@ static irqreturn_t tegra_hdmi_irq(int irq, void *data)
 {
 	struct tegra_hdmi *hdmi = data;
 	u32 value;
-	int err;
 
 	value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_INT_STATUS);
 	tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_INT_STATUS);
@@ -1626,16 +1764,7 @@ static irqreturn_t tegra_hdmi_irq(int irq, void *data)
 			format = value & SOR_AUDIO_HDA_CODEC_SCRATCH0_FMT_MASK;
 
 			tegra_hda_parse_format(format, &hdmi->format);
-
-			err = tegra_hdmi_setup_audio(hdmi);
-			if (err < 0) {
-				tegra_hdmi_disable_audio_infoframe(hdmi);
-				tegra_hdmi_disable_audio(hdmi);
-			} else {
-				tegra_hdmi_setup_audio_infoframe(hdmi);
-				tegra_hdmi_enable_audio_infoframe(hdmi);
-				tegra_hdmi_enable_audio(hdmi);
-			}
+			tegra_hdmi_reconfigure_audio(hdmi);
 		} else {
 			tegra_hdmi_disable_audio_infoframe(hdmi);
 			tegra_hdmi_disable_audio(hdmi);
@@ -1662,6 +1791,8 @@ static int tegra_hdmi_probe(struct platform_device *pdev)
 	hdmi->stereo = false;
 	hdmi->dvi = false;
 
+	mutex_init(&hdmi->audio_lock);
+
 	hdmi->clk = devm_clk_get(&pdev->dev, NULL);
 	if (IS_ERR(hdmi->clk)) {
 		dev_err(&pdev->dev, "failed to get clock\n");
-- 
2.33.1


  parent reply	other threads:[~2021-12-04 14:46 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-04 14:37 [PATCH v4 00/22] Support HDMI audio on NVIDIA Tegra20 Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 01/22] ASoC: dt-bindings: Add binding for Tegra20 S/PDIF Dmitry Osipenko
2021-12-16 13:56   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 02/22] ASoC: dt-bindings: tegra20-i2s: Convert to schema Dmitry Osipenko
2021-12-16 13:59   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 03/22] ASoC: dt-bindings: tegra20-i2s: Document new nvidia, fixed-parent-rate property Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 04/22] dt-bindings: host1x: Document optional HDMI sound-dai-cells Dmitry Osipenko
2021-12-16 14:20   ` Thierry Reding
2021-12-17 11:12     ` Mark Brown
2021-12-17 11:55       ` Dmitry Osipenko
2021-12-17 12:02         ` Thierry Reding
2021-12-17 12:06           ` Dmitry Osipenko
2021-12-17 17:18             ` Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 05/22] ASoC: tegra20: spdif: Set FIFO trigger level Dmitry Osipenko
2021-12-16 15:15   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 06/22] ASoC: tegra20-spdif: stop setting slave_id Dmitry Osipenko
2021-12-16 15:16   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 07/22] ASoC: tegra20: spdif: Support device-tree Dmitry Osipenko
2021-12-16 15:17   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 08/22] ASoC: tegra20: spdif: Improve driver's code Dmitry Osipenko
2021-12-16 15:18   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 09/22] ASoC: tegra20: spdif: Use more resource-managed helpers Dmitry Osipenko
2021-12-16 15:21   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 10/22] ASoC: tegra20: spdif: Reset hardware Dmitry Osipenko
2021-12-16 15:22   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 11/22] ASoC: tegra20: spdif: Support system suspend Dmitry Osipenko
2021-12-16 15:22   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 12/22] ASoC: tegra20: spdif: Filter out unsupported rates Dmitry Osipenko
2021-12-16 15:30   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 13/22] ASoC: tegra20: i2s: " Dmitry Osipenko
2021-12-16 15:31   ` Thierry Reding
2021-12-04 14:37 ` [PATCH v4 14/22] drm/tegra: hdmi: Unwind tegra_hdmi_init() errors Dmitry Osipenko
2021-12-04 14:37 ` Dmitry Osipenko [this message]
2021-12-04 14:37 ` [PATCH v4 16/22] ARM: tegra_defconfig: Enable S/PDIF driver Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 17/22] ARM: config: multi v7: Enable NVIDIA Tegra20 " Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 18/22] ARM: config: multi v7: Enable NVIDIA Tegra20 APB DMA driver Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 19/22] ARM: tegra: Add S/PDIF node to Tegra20 device-tree Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 20/22] ARM: tegra: Add HDMI audio graph " Dmitry Osipenko
2021-12-16 13:46   ` Thierry Reding
2021-12-16 14:24     ` Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 21/22] ARM: tegra: acer-a500: Enable S/PDIF and HDMI audio Dmitry Osipenko
2021-12-04 14:37 ` [PATCH v4 22/22] ARM: tegra: paz00: " Dmitry Osipenko
2021-12-15 18:57 ` [PATCH v4 00/22] Support HDMI audio on NVIDIA Tegra20 Mark Brown
2021-12-15 19:19   ` Dmitry Osipenko
2021-12-15 19:58     ` Mark Brown
2021-12-16 13:55     ` Thierry Reding
2021-12-16 15:09       ` Dmitry Osipenko
2021-12-16 14:29     ` Dmitry Osipenko
2021-12-17  6:04       ` Vinod Koul
2021-12-17 12:06         ` Dmitry Osipenko
2021-12-21  2:50 ` (subset) " Mark Brown

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