alsa-devel.alsa-project.org archive mirror
 help / color / mirror / Atom feed
From: Bard Liao <yung-chuan.liao@linux.intel.com>
To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org
Cc: vinod.koul@linaro.org, linux-kernel@vger.kernel.org,
	pierre-louis.bossart@linux.intel.com, bard.liao@intel.com,
	tiwai@suse.de
Subject: [PATCH 05/20] soundwire: intel/cadence: set ip_offset at run-time
Date: Thu, 23 Mar 2023 13:44:37 +0800	[thread overview]
Message-ID: <20230323054452.1543233-6-yung-chuan.liao@linux.intel.com> (raw)
In-Reply-To: <20230323054452.1543233-1-yung-chuan.liao@linux.intel.com>

From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>

Select relevant ip-offset depending on hardware version. This offset
is used to access MCP_ or IP_MCP_ registers with a fixed offset.

For existing platforms, the offset is exactly zero. Starting with
LunarLake, the offset is 0x4000.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
 drivers/soundwire/cadence_master.h  | 2 ++
 drivers/soundwire/intel.h           | 2 ++
 drivers/soundwire/intel_auxdevice.c | 1 +
 drivers/soundwire/intel_init.c      | 2 ++
 4 files changed, 7 insertions(+)

diff --git a/drivers/soundwire/cadence_master.h b/drivers/soundwire/cadence_master.h
index b653734085d9..b0f0bf90640b 100644
--- a/drivers/soundwire/cadence_master.h
+++ b/drivers/soundwire/cadence_master.h
@@ -14,6 +14,8 @@
  */
 #define CDNS_MCP_IP_MAX_CMD_LEN		32
 
+#define SDW_CADENCE_MCP_IP_OFFSET	0x4000
+
 /**
  * struct sdw_cdns_pdi: PDI (Physical Data Interface) instance
  *
diff --git a/drivers/soundwire/intel.h b/drivers/soundwire/intel.h
index 51aa42a5a824..1b23292bb8be 100644
--- a/drivers/soundwire/intel.h
+++ b/drivers/soundwire/intel.h
@@ -10,6 +10,7 @@
  * @hw_ops: platform-specific ops
  * @mmio_base: mmio base of SoundWire registers
  * @registers: Link IO registers base
+ * @ip_offset: offset for MCP_IP registers
  * @shim: Audio shim pointer
  * @shim_vs: Audio vendor-specific shim pointer
  * @alh: ALH (Audio Link Hub) pointer
@@ -28,6 +29,7 @@ struct sdw_intel_link_res {
 
 	void __iomem *mmio_base; /* not strictly needed, useful for debug */
 	void __iomem *registers;
+	u32 ip_offset;
 	void __iomem *shim;
 	void __iomem *shim_vs;
 	void __iomem *alh;
diff --git a/drivers/soundwire/intel_auxdevice.c b/drivers/soundwire/intel_auxdevice.c
index 5021be0f4158..b02cef4f4b66 100644
--- a/drivers/soundwire/intel_auxdevice.c
+++ b/drivers/soundwire/intel_auxdevice.c
@@ -144,6 +144,7 @@ static int intel_link_probe(struct auxiliary_device *auxdev,
 	sdw->link_res = &ldev->link_res;
 	cdns->dev = dev;
 	cdns->registers = sdw->link_res->registers;
+	cdns->ip_offset = sdw->link_res->ip_offset;
 	cdns->instance = sdw->instance;
 	cdns->msg_count = 0;
 
diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c
index e0023af9e0e1..43d339c6bcee 100644
--- a/drivers/soundwire/intel_init.c
+++ b/drivers/soundwire/intel_init.c
@@ -66,10 +66,12 @@ static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res *
 	if (!res->ext) {
 		link->registers = res->mmio_base + SDW_LINK_BASE
 			+ (SDW_LINK_SIZE * link_id);
+		link->ip_offset = 0;
 		link->shim = res->mmio_base + res->shim_base;
 		link->alh = res->mmio_base + res->alh_base;
 	} else {
 		link->registers = res->mmio_base + SDW_IP_BASE(link_id);
+		link->ip_offset = SDW_CADENCE_MCP_IP_OFFSET;
 		link->shim = res->mmio_base +  SDW_SHIM2_GENERIC_BASE(link_id);
 		link->shim_vs = res->mmio_base + SDW_SHIM2_VS_BASE(link_id);
 	}
-- 
2.25.1


  parent reply	other threads:[~2023-03-23  5:34 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-23  5:44 [PATCH 00/20] ASoC/soundwire: add support for ACE2.x Bard Liao
2023-03-23  5:44 ` [PATCH 01/20] ASoC: SOF: Intel: shim: add enum for ACE 2.0 IP used in LunarLake Bard Liao
2023-03-23 14:18   ` Mark Brown
2023-03-23  5:44 ` [PATCH 02/20] soundwire: intel: add ACE2.x SHIM definitions Bard Liao
2023-03-23  5:44 ` [PATCH 03/20] soundwire: intel_ace2x: add empty new ops for LunarLake Bard Liao
2023-03-23  5:44 ` [PATCH 04/20] soundwire/ASOC: Intel: update offsets " Bard Liao
2023-03-23 14:18   ` Mark Brown
2023-03-23  5:44 ` Bard Liao [this message]
2023-03-23  5:44 ` [PATCH 06/20] ASoC/soundwire: intel: pass hdac_bus pointer for link management Bard Liao
2023-03-23 14:19   ` Mark Brown
2023-03-23  5:44 ` [PATCH 07/20] soundwire: intel: add eml_lock in the interface for new platforms Bard Liao
2023-03-23  5:44 ` [PATCH 08/20] ASoC: SOF: Intel: hda: retrieve SoundWire eml_lock and pass pointer Bard Liao
2023-03-23 14:20   ` Mark Brown
2023-03-23  5:44 ` [PATCH 09/20] soundwire: intel_init: use eml_lock parameter Bard Liao
2023-03-23  5:44 ` [PATCH 10/20] soundwire: intel_ace2x: add debugfs support Bard Liao
2023-03-23  5:44 ` [PATCH 11/20] soundwire: intel_ace2x: add link power-up/down helpers Bard Liao
2023-03-23  5:44 ` [PATCH 12/20] soundwire: intel_ace2x: set SYNCPRD before powering-up Bard Liao
2023-03-23  5:44 ` [PATCH 13/20] soundwire: intel_ace2x: configure link PHY Bard Liao
2023-03-23  5:44 ` [PATCH 14/20] soundwire: intel_ace2x: add DAI registration Bard Liao
2023-03-23  5:44 ` [PATCH 15/20] soundwire: intel_ace2x: add sync_arm/sync_go helpers Bard Liao
2023-03-23  5:44 ` [PATCH 16/20] soundwire: intel_ace2x: use common helpers for bus start/stop Bard Liao
2023-03-23  5:44 ` [PATCH 17/20] soundwire: intel_ace2x: enable wake support Bard Liao
2023-03-23  5:44 ` [PATCH 18/20] soundwire: intel_ace2x: add check_cmdsync_unlocked helper Bard Liao
2023-03-23  5:44 ` [PATCH 19/20] soundwire: bus: add new manager callback to deal with peripheral enumeration Bard Liao
2023-03-23  5:44 ` [PATCH 20/20] soundwire: intel_ace2x: add new_peripheral_assigned callback Bard Liao
2023-03-23 14:15 ` [PATCH 00/20] ASoC/soundwire: add support for ACE2.x Liao, Bard
2023-04-12 10:07 ` Vinod Koul
2023-04-12 14:11   ` Pierre-Louis Bossart
2023-04-12 15:22     ` Vinod Koul
2023-04-12 16:06       ` Pierre-Louis Bossart

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230323054452.1543233-6-yung-chuan.liao@linux.intel.com \
    --to=yung-chuan.liao@linux.intel.com \
    --cc=alsa-devel@alsa-project.org \
    --cc=bard.liao@intel.com \
    --cc=broonie@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=pierre-louis.bossart@linux.intel.com \
    --cc=tiwai@suse.de \
    --cc=vinod.koul@linaro.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).