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d="scan'208";a="353588091" Received: from fmsmsx601.amr.corp.intel.com ([10.18.126.81]) by FMSMGA003.fm.intel.com with ESMTP; 06 Oct 2020 10:50:25 -0700 Received: from fmsmsx610.amr.corp.intel.com (10.18.126.90) by fmsmsx601.amr.corp.intel.com (10.18.126.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Tue, 6 Oct 2020 10:50:25 -0700 Received: from fmsmsx612.amr.corp.intel.com (10.18.126.92) by fmsmsx610.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Tue, 6 Oct 2020 10:50:24 -0700 Received: from fmsmsx612.amr.corp.intel.com ([10.18.126.92]) by fmsmsx612.amr.corp.intel.com ([10.18.126.92]) with mapi id 15.01.1713.004; Tue, 6 Oct 2020 10:50:24 -0700 From: "Saleem, Shiraz" To: Leon Romanovsky , Pierre-Louis Bossart Subject: RE: [PATCH v2 1/6] Add ancillary bus support Thread-Topic: [PATCH v2 1/6] Add ancillary bus support Thread-Index: AQHWm0x+bCEx5k0iU0+RSRzmm941iKmKoH2AgACGDICAAB03gP//lu/w Date: Tue, 6 Oct 2020 17:50:21 +0000 Message-ID: <7c188f4d06f3499bb0262599fd9b55d3@intel.com> References: <20201005182446.977325-1-david.m.ertman@intel.com> <20201005182446.977325-2-david.m.ertman@intel.com> <20201006071821.GI1874917@unreal> <20201006170241.GM1874917@unreal> In-Reply-To: <20201006170241.GM1874917@unreal> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 x-originating-ip: [10.1.200.100] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 07 Oct 2020 17:54:46 +0200 Cc: "alsa-devel@alsa-project.org" , "kuba@kernel.org" , "parav@mellanox.com" , "tiwai@suse.de" , "netdev@vger.kernel.org" , "ranjani.sridharan@linux.intel.com" , "fred.oh@linux.intel.com" , "linux-rdma@vger.kernel.org" , "dledford@redhat.com" , "broonie@kernel.org" , "jgg@nvidia.com" , "gregkh@linuxfoundation.org" , "Ertman, David M" , "Williams, Dan J" , "davem@davemloft.net" , "Patil, Kiran" X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" > Subject: Re: [PATCH v2 1/6] Add ancillary bus support >=20 > On Tue, Oct 06, 2020 at 10:18:07AM -0500, Pierre-Louis Bossart wrote: > > Thanks for the review Leon. > > > > > > Add support for the Ancillary Bus, ancillary_device and ancillary_d= river. > > > > It enables drivers to create an ancillary_device and bind an > > > > ancillary_driver to it. > > > > > > I was under impression that this name is going to be changed. > > > > It's part of the opens stated in the cover letter. >=20 > ok, so what are the variants? > system bus (sysbus), sbsystem bus (subbus), crossbus ? >=20 > > > > [...] > > > > > > + const struct my_driver my_drv =3D { > > > > + .ancillary_drv =3D { > > > > + .driver =3D { > > > > + .name =3D "myancillarydrv", > > > > > > Why do we need to give control over driver name to the driver authors= ? > > > It can be problematic if author puts name that already exists. > > > > Good point. When I used the ancillary_devices for my own SoundWire > > test, the driver name didn't seem specifically meaningful but needed > > to be set to something, what mattered was the id_table. Just thinking > > aloud, maybe we can add prefixing with KMOD_BUILD, as we've done > > already to avoid collisions between device names? >=20 > IMHO, it shouldn't be controlled by the drivers at all and need to have k= ernel > module name hardwired. Users will use it later for various bind/unbind/au= toprobe > tricks and it will give predictability for them. >=20 +1. This name is not used in the match. Having the bus hardwire the modname= sounds like a good idea. Shiraz