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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Cc: Guennadi Liakhovetski , "alsa-devel@alsa-project.org" , Andy Shevchenko , Kuninori Morimoto , Kai Vehmanen , "linux-kernel@vger.kernel.org" , "Rojewski, Cezary" , Jie Yang , Pierre-Louis Bossart , Takashi Iwai , Liam Girdwood , Sam McNally , Mark Brown , Ranjani Sridharan , Daniel Stuart , "yuhsuan@google.com" , "Lu, Brent" , Damian van Soelen X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Takashi Iwai =E6=96=BC 2020=E5=B9=B48=E6=9C=8812=E6=97=A5 = =E9=80=B1=E4=B8=89 =E4=B8=8B=E5=8D=882:58=E5=AF=AB=E9=81=93=EF=BC=9A > > On Wed, 12 Aug 2020 08:53:42 +0200, > Yu-Hsuan Hsu wrote: > > > > Takashi Iwai =E6=96=BC 2020=E5=B9=B48=E6=9C=8812=E6=97= =A5 =E9=80=B1=E4=B8=89 =E4=B8=8B=E5=8D=882:14=E5=AF=AB=E9=81=93=EF=BC=9A > > > > > > On Wed, 12 Aug 2020 05:09:58 +0200, > > > Yu-Hsuan Hsu wrote: > > > > > > > > Mark Brown =E6=96=BC 2020=E5=B9=B48=E6=9C=8812= =E6=97=A5 =E9=80=B1=E4=B8=89 =E4=B8=8A=E5=8D=881:22=E5=AF=AB=E9=81=93=EF=BC= =9A > > > > > > > > > > On Tue, Aug 11, 2020 at 11:54:38AM -0500, Pierre-Louis Bossart wr= ote: > > > > > > > > > > > > constraint logic needs to know about this DSP limitation - it= seems like > > > > > > > none of this is going to change without something new going i= nto the > > > > > > > mix? We at least need a new question to ask about the DSP fi= rmware I > > > > > > > think. > > > > > > > > > > > I just tested aplay -Dhw: on a Cyan Chromebook with the Ubuntu = kernel 5.4, > > > > > > and I see no issues with the 240 sample period. Same with 432, = 960, 9600, > > > > > > etc. > > > > > > > > > > > I also tried just for fun what happens with 256 samples, and I = don't see any > > > > > > underflows thrown either, so I am wondering what exactly the pr= oblem is? > > > > > > Something's not adding up. I would definitively favor multiple = of 1ms > > > > > > periods, since it's the only case that was productized, but the= re's got to > > > > > > me something a side effect of how CRAS programs the hw_params. > > > > > > > > > > Is it something that goes wrong with longer playbacks possibly (e= g, > > > > > someone watching a feature film or something)? > > > > > > > > Thanks for testing! > > > > > > > > After doing some experiments, I think I can identify the problem mo= re precisely. > > > > 1. aplay can not reproduce this issue because it writes samples > > > > immediately when there are some space in the buffer. However, you c= an > > > > add --test-position to see how the delay grows with period size 256= . > > > > > aplay -Dhw:1,0 --period-size=3D256 --buffer-size=3D480 /dev/zero = -d 1 -f dat --test-position > > > > Playing raw data '/dev/zero' : Signed 16 bit Little Endian, Rate 48= 000 > > > > Hz, Stereo > > > > Suspicious buffer position (1 total): avail =3D 0, delay =3D 2064, = buffer =3D 512 > > > > Suspicious buffer position (2 total): avail =3D 0, delay =3D 2064, = buffer =3D 512 > > > > Suspicious buffer position (3 total): avail =3D 0, delay =3D 2096, = buffer =3D 512 > > > > ... > > > > > > Isn't this about the alignment of the buffer size against the period > > > size, not the period size itself? i.e. in the example above, the > > > buffer size isn't a multiple of period size, and DSP can't handle if > > > the position overlaps the buffer size in a half way. > > > > > > If that's the problem (and it's an oft-seen restriction), the right > > > constraint is > > > snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); > > > > > > > > > Takashi > > Oh sorry for my typo. The issue happens no matter what buffer size is > > set. Actually, even if I want to set 480, it will change to 512 > > automatically. > > Suspicious buffer position (1 total): avail =3D 0, delay =3D 2064, buff= er > > =3D 512 <-this one is the buffer size > > OK, then it means that the buffer size alignment is already in place. > > And this large delay won't happen if you use period size 240? > > > Takashi Yes! If I set the period size to 240, it will not print "Suspicious buffer position ..." Yu-Hsuan > > > > > 2. Since many samples are moved to DSP(delay), the measured rate of > > > > the ring-buffer is high. (I measured it by alsa_conformance_test, > > > > which only test the sampling rate in the ring buffer of kernel not > > > > DSP) > > > > > > > > 3. Since CRAS writes samples with a fixed frequency, this behavior > > > > will take all samples from the ring buffer, which is seen as underr= un > > > > by CRAS. (It seems that it is not a real underrun because that avai= l > > > > does not larger than buffer size. Maybe CRAS should also take dalay > > > > into account.) > > > > > > > > 4. In spite of it is not a real underrun, the large delay is still = a > > > > big problem. Can we apply the constraint to fix it? Or any better > > > > idea? > > > > > > > > Thanks, > > > > Yu-Hsuan > > > > > >