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Thu, 30 Jul 2020 15:25:47 +0000 From: "Lu, Brent" To: Takashi Iwai Subject: RE: [PATCH v2 0/2] Add period size constraint for Atom Chromebook Thread-Topic: [PATCH v2 0/2] Add period size constraint for Atom Chromebook Thread-Index: AQHWZkoHaHNzjDWzQkeprEz0RLpK5KkgOKMAgAAEOjA= Date: Thu, 30 Jul 2020 15:25:47 +0000 Message-ID: References: <1596096815-32043-1-git-send-email-brent.lu@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.2.0.6 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: suse.de; dkim=none (message not signed) header.d=none;suse.de; dmarc=none action=none header.from=intel.com; x-originating-ip: [114.25.81.97] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 7ae87027-1732-4cb7-81c2-08d8349cd599 x-ms-traffictypediagnostic: DM6PR11MB3340: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8273; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB3642.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7ae87027-1732-4cb7-81c2-08d8349cd599 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Jul 2020 15:25:47.3746 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 5ritYdrzGPl/qNmWs1LlMk7dERHZ/3Sdvs+FQw3upJoyvWklXzaApWDLYb5F5FJUajf9/g2dDuF+zUkRgs74uQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR11MB3340 X-OriginatorOrg: intel.com Cc: Guennadi Liakhovetski , "alsa-devel@alsa-project.org" , Kuninori Morimoto , Kai Vehmanen , "Rojewski, Cezary" , Jie Yang , "linux-kernel@vger.kernel.org" , Takashi Iwai , Liam Girdwood , Sam McNally , Mark Brown , Ranjani Sridharan , Daniel Stuart , Andy Shevchenko , Pierre-Louis Bossart , Yu-Hsuan Hsu , Damian van Soelen X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" > > > > Two different constraints are implemented: one is in platform's CPU > > DAI to enforce period sizes which are already used in Android BSP. The > > other is in Atom Chromebook's machine driver to use 240 as period size. > > > > Changes since v1: > > -Add comma at the end of media_period_size array declaration. >=20 > Is it a hardware restriction? Unless it's a must for some hardware issue= s, > enforcing such a small period size is nothing but a drawback for a system > without CRAS. Hi Takashi, This patch is cherry-picked from Chrome's branch which is originally implem= ented by google. They found this value works best with CRAS and these two machine drivers are for Chromebooks. Other BSW machine drivers are untouched. Regards, Brent >=20 >=20 > thanks, >=20 > Takashi >=20 > > > > Brent Lu (1): > > ASoC: intel: atom: Add period size constraint > > > > Yu-Hsuan Hsu (1): > > ASoC: Intel: Add period size constraint on strago board > > > > sound/soc/intel/atom/sst-mfld-platform-pcm.c | 15 +++++++++++++++ > > sound/soc/intel/boards/cht_bsw_max98090_ti.c | 14 +++++++++++++- > > sound/soc/intel/boards/cht_bsw_rt5645.c | 14 +++++++++++++- > > 3 files changed, 41 insertions(+), 2 deletions(-) > > > > -- > > 2.7.4 > >