alsa-devel.alsa-project.org archive mirror
 help / color / mirror / Atom feed
From: "Rojewski, Cezary" <cezary.rojewski@intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: "pierre-louis.bossart@linux.intel.com"
	<pierre-louis.bossart@linux.intel.com>,
	"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
	"Kaczmarski, Filip" <filip.kaczmarski@intel.com>,
	"N, Harshapriya" <harshapriya.n@intel.com>,
	"Barlik, Marcin" <marcin.barlik@intel.com>,
	"zwisler@google.com" <zwisler@google.com>,
	"lgirdwood@gmail.com" <lgirdwood@gmail.com>,
	"tiwai@suse.com" <tiwai@suse.com>,
	"Proborszcz, Filip" <filip.proborszcz@intel.com>,
	"broonie@kernel.org" <broonie@kernel.org>,
	"amadeuszx.slawinski@linux.intel.com"
	<amadeuszx.slawinski@linux.intel.com>,
	"Wasko, Michal" <michal.wasko@intel.com>,
	"cujomalainey@chromium.org" <cujomalainey@chromium.org>,
	"Hejmowski, Krzysztof" <krzysztof.hejmowski@intel.com>,
	"Papierkowski, Piotr \(Habana\)" <ppapierkowski@habana.ai>,
	"Gopal,  Vamshi Krishna" <vamshi.krishna.gopal@intel.com>
Subject: RE: [PATCH v5 01/13] ASoC: Intel: Add catpt device
Date: Wed, 16 Sep 2020 19:53:19 +0000	[thread overview]
Message-ID: <d41e06595a9944afaa2c119ecb8efae1@intel.com> (raw)
In-Reply-To: <20200916191245.GF3956970@smile.fi.intel.com>

> On Wed, Sep 16, 2020 at 06:30:27PM +0000, Rojewski, Cezary wrote:
> > > On Wed, Sep 16, 2020 at 06:24:56PM +0300, Andy Shevchenko wrote:
> > > > On Tue, Sep 15, 2020 at 06:29:32PM +0200, Cezary Rojewski wrote:
> > > > > Declare base structures, registers and device routines for the catpt
> > > > > solution. Catpt deprecates and is a direct replacement for
> > > > > sound/soc/intel/haswell. Supports Lynxpoint and Wildcat Point both.
> > > >
> > > > Few nit-picks below. Overall looks good, FWIW,
> > > > Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > >
> > > Actually hold on. See below.
> > >
> > > > > +void catpt_sram_init(struct resource *sram, u32 start, u32 size);
> > > > > +void catpt_sram_free(struct resource *sram);
> > > > > +struct resource *
> > > > > +catpt_request_region(struct resource *root, resource_size_t size);
> > >
> > > These seems dangling declarations that has to be moved to the
> > > corresponding
> > > patch. Please, revisit entire series to be sure that:
> > >
> > > - each patch doesn't add any warnings on W=1
> > > - each patch doesn't have dangling stuff
> > > - each patch is bisectable for compilation and run-time
> > >
> >
> > TLDR: you want patches:
> > 6/13 ASoC: Intel: catpt: PCM operations
> > 5/13 ASoC: Intel: catpt: Add IPC messages
> > 4/13 ASoC: Intel: catpt: Implement IPC protocol
> > 3/13 ASoC: Intel: catpt: Firmware loading and context restore
> > 2/13 ASoC: Intel: catpt: Define DSP operations
> > 1/13 ASoC: Intel: Add catpt device
> >
> > squashed. There is no other way to achieve that without combining
> > all the core-code together. fs and traces can be provided separately,
> > but not the first 6.
> 
> No. My point is introduce header (declaration) with definition (c-file)
> together. Like those three of four functions.
> 

Problem is that all of these are intertwined. I'll end up creating
patches which will be constantly updating files added by the opening
patch e.g.: core.h. Even if I'm to let's say, separate "just" pcm
operations, then the following:

int catpt_register_plat_component(struct catpt_dev *cdev);
void catpt_stream_update_position(struct catpt_dev *cdev,
                                  struct catpt_stream_runtime *stream,
                                  struct catpt_notify_position *pos);
struct catpt_stream_runtime *
catpt_stream_find(struct catpt_dev *cdev, u8 stream_hw_id);
int catpt_arm_stream_templates(struct catpt_dev *cdev);

have to removed initially from core.h. These, however, are part of
standard ipc flow and device probing. In consequence I'll have to update
the programming flow later on for these files.

I'll dig again and see what and where could be split.
Hope I'm wrong and the results won't be as ugly as I think they're
going to be.

Thanks for your input Andy, once again!
Czarek


  reply	other threads:[~2020-09-16 19:54 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-15 16:29 [PATCH v5 00/13] ASoC: Intel: Catpt - Lynx and Wildcat point Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 01/13] ASoC: Intel: Add catpt device Cezary Rojewski
2020-09-16 15:24   ` Andy Shevchenko
2020-09-16 16:56     ` Andy Shevchenko
2020-09-16 18:30       ` Rojewski, Cezary
2020-09-16 19:12         ` Andy Shevchenko
2020-09-16 19:53           ` Rojewski, Cezary [this message]
2020-09-17 10:58         ` Liam Girdwood
2020-09-17 15:15     ` Rojewski, Cezary
2020-09-21 10:59       ` Rojewski, Cezary
2020-09-15 16:29 ` [PATCH v5 02/13] ASoC: Intel: catpt: Define DSP operations Cezary Rojewski
2020-09-16 15:44   ` Andy Shevchenko
2020-09-17 15:29     ` Rojewski, Cezary
2020-09-18 13:52       ` Andy Shevchenko
2020-09-21 10:54         ` Rojewski, Cezary
2020-09-15 16:29 ` [PATCH v5 03/13] ASoC: Intel: catpt: Firmware loading and context restore Cezary Rojewski
2020-09-16 16:58   ` Andy Shevchenko
2020-09-15 16:29 ` [PATCH v5 04/13] ASoC: Intel: catpt: Implement IPC protocol Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 05/13] ASoC: Intel: catpt: Add IPC messages Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 06/13] ASoC: Intel: catpt: PCM operations Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 07/13] ASoC: Intel: catpt: Event tracing Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 08/13] ASoC: Intel: catpt: Simple sysfs attributes Cezary Rojewski
2020-09-16 16:50   ` Andy Shevchenko
2020-09-17 15:37     ` Rojewski, Cezary
2020-09-18 13:54       ` Andy Shevchenko
2020-09-15 16:29 ` [PATCH v5 09/13] ASoC: Intel: Select catpt and deprecate haswell Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 10/13] ASoC: Intel: haswell: Remove haswell-solution specific code Cezary Rojewski
2020-09-16 15:50   ` Andy Shevchenko
2020-09-15 16:29 ` [PATCH v5 11/13] ASoC: Intel: broadwell: " Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 12/13] ASoC: Intel: bdw-5650: " Cezary Rojewski
2020-09-15 16:29 ` [PATCH v5 13/13] ASoC: Intel: bdw-5677: " Cezary Rojewski

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=d41e06595a9944afaa2c119ecb8efae1@intel.com \
    --to=cezary.rojewski@intel.com \
    --cc=alsa-devel@alsa-project.org \
    --cc=amadeuszx.slawinski@linux.intel.com \
    --cc=andriy.shevchenko@linux.intel.com \
    --cc=broonie@kernel.org \
    --cc=cujomalainey@chromium.org \
    --cc=filip.kaczmarski@intel.com \
    --cc=filip.proborszcz@intel.com \
    --cc=harshapriya.n@intel.com \
    --cc=krzysztof.hejmowski@intel.com \
    --cc=lgirdwood@gmail.com \
    --cc=marcin.barlik@intel.com \
    --cc=michal.wasko@intel.com \
    --cc=pierre-louis.bossart@linux.intel.com \
    --cc=ppapierkowski@habana.ai \
    --cc=tiwai@suse.com \
    --cc=vamshi.krishna.gopal@intel.com \
    --cc=zwisler@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).