From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7583C433E0 for ; Mon, 25 Jan 2021 15:20:27 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BC9D122D50 for ; Mon, 25 Jan 2021 15:20:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BC9D122D50 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 291A41817; Mon, 25 Jan 2021 16:19:35 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 291A41817 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1611588025; bh=RcIx3Pa61SuIDo8rPXo0O/s6zdMUvNcVepVSFSvpjkE=; h=Date:From:To:Subject:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=RSJBAtgIglyNMGJp2A4HyxgKz+qFr1QrjAVaVzetbD1V2IVAYgPq1OmyTwJ8et4NV ZeqLLJmsl+LRAeeYaEmtSKg7lO42jqmxOz3HkrolsHZUcqUfqmjLphCcTTtOzW3dLM N3KoDuD5TnES5H/d6BHHjZS9HQvEDx0vnxLA6Rl0= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id A8A16F8025F; Mon, 25 Jan 2021 16:18:57 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id BDEAAF80269; Mon, 25 Jan 2021 16:18:55 +0100 (CET) Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 51218F8025F for ; Mon, 25 Jan 2021 16:18:53 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 51218F8025F X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id E975FAD7A; Mon, 25 Jan 2021 15:18:52 +0000 (UTC) Date: Mon, 25 Jan 2021 16:18:52 +0100 Message-ID: From: Takashi Iwai To: Dmitry Osipenko Subject: Re: [PATCH v3 2/6] ALSA: hda/tegra: Reset hardware In-Reply-To: <20210120003154.26749-3-digetx@gmail.com> References: <20210120003154.26749-1-digetx@gmail.com> <20210120003154.26749-3-digetx@gmail.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 Emacs/25.3 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Cc: alsa-devel@alsa-project.org, Nicolas Chauvet , linux-kernel@vger.kernel.org, Sameer Pujar , Takashi Iwai , Jonathan Hunter , Thierry Reding , Matt Merhar , Peter Geis , linux-tegra@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Wed, 20 Jan 2021 01:31:50 +0100, Dmitry Osipenko wrote: > > Reset hardware on RPM-resume in order to bring it into a predictable > state. > > Tested-by: Peter Geis # Ouya T30 audio works > Tested-by: Matt Merhar # Ouya T30 boot-tested > Tested-by: Nicolas Chauvet # TK1 boot-tested > Signed-off-by: Dmitry Osipenko Currently we have neither dependency nor reverse-selection of CONFIG_RESET_CONTROLLER. It wouldn't be a problem for builds, but you'll get a runtime error from devm_reset_control_array_get_exclusive() always when CONFIG_RESET_CONTROLLER=n. I guess it must be a corner case, but just to be sure. thanks, Takashi > --- > sound/pci/hda/hda_tegra.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c > index a25bf7083c28..04dcd4cdfd9e 100644 > --- a/sound/pci/hda/hda_tegra.c > +++ b/sound/pci/hda/hda_tegra.c > @@ -17,6 +17,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -70,6 +71,7 @@ > struct hda_tegra { > struct azx chip; > struct device *dev; > + struct reset_control *reset; > struct clk_bulk_data clocks[3]; > unsigned int nclocks; > void __iomem *regs; > @@ -167,6 +169,12 @@ static int __maybe_unused hda_tegra_runtime_resume(struct device *dev) > struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip); > int rc; > > + if (!chip->running) { > + rc = reset_control_assert(hda->reset); > + if (rc) > + return rc; > + } > + > rc = clk_bulk_prepare_enable(hda->nclocks, hda->clocks); > if (rc != 0) > return rc; > @@ -176,6 +184,12 @@ static int __maybe_unused hda_tegra_runtime_resume(struct device *dev) > /* disable controller wake up event*/ > azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) & > ~STATESTS_INT_MASK); > + } else { > + usleep_range(10, 100); > + > + rc = reset_control_deassert(hda->reset); > + if (rc) > + return rc; > } > > return 0; > @@ -441,6 +455,12 @@ static int hda_tegra_probe(struct platform_device *pdev) > return err; > } > > + hda->reset = devm_reset_control_array_get_exclusive(&pdev->dev); > + if (IS_ERR(hda->reset)) { > + err = PTR_ERR(hda->reset); > + goto out_free; > + } > + > hda->clocks[hda->nclocks++].id = "hda"; > hda->clocks[hda->nclocks++].id = "hda2hdmi"; > hda->clocks[hda->nclocks++].id = "hda2codec_2x"; > -- > 2.29.2 >