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Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXMB02.amd.com (165.204.84.17) by BN8NAM11FT045.mail.protection.outlook.com (10.13.177.47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.2814.13 via Frontend Transport; Wed, 25 Mar 2020 14:29:49 +0000 Received: from SATLEXMB01.amd.com (10.181.40.142) by SATLEXMB02.amd.com (10.181.40.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 25 Mar 2020 09:29:48 -0500 Received: from agrodzovsky-All-Series.amd.com (10.180.168.240) by SATLEXMB01.amd.com (10.181.40.142) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Wed, 25 Mar 2020 09:29:48 -0500 From: Andrey Grodzovsky To: Subject: [PATCH 0/4] Invalidate and flush caches at the beginning of every gfx IB Date: Wed, 25 Mar 2020 10:29:36 -0400 Message-ID: <1585146580-27143-1-git-send-email-andrey.grodzovsky@amd.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Ip=[165.204.84.17]; Helo=[SATLEXMB02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4272 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ken.Qiao@amd.com, Marek.Olsak@amd.com, Andrey Grodzovsky Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" This patchset introduces AQUIRE_MEM packet submission at the begining of each gfx IB if requested by user mode client. This is helpful in solving issues with cache coherency during amdgpu_test and Vulkan CTS tests. Andrey Grodzovsky (4): drm/amdgpu: Add new ring callback to insert memory sync drm/amdgpu: Add AQUIRE_MEM PACKET3 fields defintion drm/amdgpu: Add mem_sync implementation for all the ASICs. drm/amdgpu: Add a UAPI flag for user to call mem_sync drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 3 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 4 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 3 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 27 +++++++++++++++++- drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 16 ++++++++++- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 16 ++++++++++- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 17 ++++++++++- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 22 ++++++++++++++- drivers/gpu/drm/amd/amdgpu/nvd.h | 48 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/soc15d.h | 25 ++++++++++++++++- include/uapi/drm/amdgpu_drm.h | 2 ++ 12 files changed, 178 insertions(+), 6 deletions(-) -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx