From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Sunpeng.Li@amd.com, Bhawanpreet.Lakha@amd.com,
Harry.Wentland@amd.com, Anthony Koo <Anthony.Koo@amd.com>,
Wyatt Wood <Wyatt.Wood@amd.com>
Subject: [PATCH 09/17] drm/amd/display: Update register defines
Date: Fri, 7 Feb 2020 10:50:02 -0500 [thread overview]
Message-ID: <20200207155010.1070737-10-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20200207155010.1070737-1-Rodrigo.Siqueira@amd.com>
From: Anthony Koo <Anthony.Koo@amd.com>
[Why]
Some register defines are redundant or updated
[How]
Update register defines
Remove some redundant defines
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Sun peng Li <Sunpeng.Li@amd.com>
---
.../drm/amd/display/dc/dcn20/dcn20_mmhubbub.h | 20 -------------------
.../gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h | 7 -------
2 files changed, 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h
index 3fccd5eeecbb..7bcee5894d2e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h
@@ -36,26 +36,6 @@
#define BASE(seg) \
BASE_INNER(seg)
-#define SR(reg_name)\
- .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
- mm ## reg_name
-
-#define SRI(reg_name, block, id)\
- .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
- mm ## block ## id ## _ ## reg_name
-
-#define SRI2(reg_name, block, id)\
- .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
- mm ## reg_name
-
-#define SRII(reg_name, block, id)\
- .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
- mm ## block ## id ## _ ## reg_name
-
-#define SF(reg_name, field_name, post_fix)\
- .field_name = reg_name ## __ ## field_name ## post_fix
-
-
#define MCIF_WB_COMMON_REG_LIST_DCN2_0(inst) \
SRI(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB, inst),\
SRI(MCIF_WB_BUFMGR_CUR_LINE_R, MCIF_WB, inst),\
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h
index 02fafb013fc6..f1ef46e8da5b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h
@@ -34,13 +34,6 @@
#define BASE(seg) \
BASE_INNER(seg)
-#define SRI(reg_name, block, id)\
- .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
- mm ## block ## id ## _ ## reg_name
-
-#define SF(reg_name, field_name, post_fix)\
- .field_name = reg_name ## __ ## field_name ## post_fix
-
#define DCN20_VMID_REG_LIST(id)\
SRI(CNTL, DCN_VM_CONTEXT, id),\
SRI(PAGE_TABLE_BASE_ADDR_HI32, DCN_VM_CONTEXT, id),\
--
2.25.0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2020-02-07 15:50 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-07 15:49 [PATCH 00/17] DC Patches February 07, 2020 Rodrigo Siqueira
2020-02-07 15:49 ` [PATCH 01/17] drm/amd/display: always apply T7/T9 delay logic Rodrigo Siqueira
2020-02-07 15:49 ` [PATCH 02/17] drm/amd/display: Don't treat missing command table as failure Rodrigo Siqueira
2020-02-07 15:49 ` [PATCH 03/17] drm/amd/display: Remove unused values from psr struct Rodrigo Siqueira
2020-02-07 15:49 ` [PATCH 04/17] drm/amd/display: Pass override OUI in to dc_init_data Rodrigo Siqueira
2020-02-07 15:49 ` [PATCH 05/17] drm/amd/display: Hookup psr set version call Rodrigo Siqueira
2020-02-07 15:49 ` [PATCH 06/17] drm/amd/display: Add AUX backlight register Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 07/17] drm/amd/display: Add backlight support via AUX Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 08/17] drm/amd/display: Toggle VSR button cause system crash Rodrigo Siqueira
2020-02-07 15:50 ` Rodrigo Siqueira [this message]
2020-02-07 15:50 ` [PATCH 10/17] drm/amd/display: Drop unused field from dc_panel_patch Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 11/17] drm/amd/display: 3.2.72 Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 12/17] drm/amd/display: add odm split logic to scaling calculations Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 13/17] drm/amd/display: add monitor patch to disable SCDC read/write Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 14/17] drm/amd/display: Don't map ATOM_ENABLE to ATOM_INIT Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 15/17] drm/amd/display: Add psr get_state call Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 16/17] drm/amd/display: Use fb_base/fb_offset if available for translation Rodrigo Siqueira
2020-02-07 15:50 ` [PATCH 17/17] drm/amd/display: DCN2.x Do not program DPPCLK if same value Rodrigo Siqueira
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200207155010.1070737-10-Rodrigo.Siqueira@amd.com \
--to=rodrigo.siqueira@amd.com \
--cc=Anthony.Koo@amd.com \
--cc=Bhawanpreet.Lakha@amd.com \
--cc=Harry.Wentland@amd.com \
--cc=Sunpeng.Li@amd.com \
--cc=Wyatt.Wood@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).