From: Likun Gao <likun.gao@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Likun Gao <Likun.Gao@amd.com>,
Kenneth Feng <Kenneth.Feng@amd.com>,
Hawking Zhang <hawking.zhang@amd.com>
Subject: [PATCH 2/2] drm/amd/powerplay: update driver if file for sienna_cichlid
Date: Wed, 24 Jun 2020 14:35:34 +0800 [thread overview]
Message-ID: <20200624063534.1953945-2-likun.gao@amd.com> (raw)
In-Reply-To: <20200624063534.1953945-1-likun.gao@amd.com>
From: Likun Gao <Likun.Gao@amd.com>
Update sienna_cichlid driver if header file to match pptable changes.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Change-Id: Idcc081797f54509ea57503cce1dc915f718f189e
---
.../powerplay/inc/smu11_driver_if_sienna_cichlid.h | 12 ++++++++----
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 2 +-
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 7 +------
3 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h
index 5322f6da3071..302c2bcf9404 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h
@@ -27,7 +27,7 @@
// *** IMPORTANT ***
// SMU TEAM: Always increment the interface version if
// any structure is changed in this file
-#define SMU11_DRIVER_IF_VERSION 0x31
+#define SMU11_DRIVER_IF_VERSION 0x32
#define PPTABLE_Sienna_Cichlid_SMU_VERSION 4
@@ -865,8 +865,7 @@ typedef struct {
uint16_t DfllGfxclkSpreadFreq; // kHz
// UCLK Spread Spectrum
- uint8_t UclkSpreadEnabled; // on or off
- uint8_t UclkSpreadPercent; // Q4.4
+ uint16_t UclkSpreadPadding;
uint16_t UclkSpreadFreq; // kHz
// FCLK Spread Spectrum
@@ -896,8 +895,11 @@ typedef struct {
uint8_t VddqOffEnabled;
uint8_t PaddingUmcFlags[2];
+ // UCLK Spread Spectrum
+ uint8_t UclkSpreadPercent[16];
+
// SECTION: Board Reserved
- uint32_t BoardReserved[15];
+ uint32_t BoardReserved[11];
// SECTION: Structure Padding
@@ -936,10 +938,12 @@ typedef struct {
int16_t OverDrivePct; // %
uint16_t FanMaximumRpm;
uint16_t FanMinimumPwm;
+ uint16_t FanAcousticLimitRpm;
uint16_t FanTargetTemperature; // Degree Celcius
uint8_t FanLinearPwmPoints[NUM_OD_FAN_MAX_POINTS];
uint8_t FanLinearTempPoints[NUM_OD_FAN_MAX_POINTS];
uint16_t MaxOpTemp; // Degree Celcius
+ uint16_t Padding_16[1];
uint8_t FanZeroRpmEnable;
uint8_t FanZeroRpmStopTemp;
uint8_t FanMode;
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
index 4fb911d8b49c..d07bf4fe6e4a 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
@@ -30,7 +30,7 @@
#define SMU11_DRIVER_IF_VERSION_NV10 0x36
#define SMU11_DRIVER_IF_VERSION_NV12 0x33
#define SMU11_DRIVER_IF_VERSION_NV14 0x36
-#define SMU11_DRIVER_IF_VERSION_Sienna_Cichlid 0x31
+#define SMU11_DRIVER_IF_VERSION_Sienna_Cichlid 0x32
/* MP Apertures */
#define MP0_Public 0x03800000
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 693ad8963d0a..459a3c62e47b 100644
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -2401,8 +2401,7 @@ static void sienna_cichlid_dump_pptable(struct smu_context *smu)
dev_info(smu->adev->dev, "DfllGfxclkSpreadPercent = 0x%x\n", pptable->DfllGfxclkSpreadPercent);
dev_info(smu->adev->dev, "DfllGfxclkSpreadFreq = 0x%x\n", pptable->DfllGfxclkSpreadFreq);
- dev_info(smu->adev->dev, "UclkSpreadEnabled = 0x%x\n", pptable->UclkSpreadEnabled);
- dev_info(smu->adev->dev, "UclkSpreadPercent = 0x%x\n", pptable->UclkSpreadPercent);
+ dev_info(smu->adev->dev, "UclkSpreadPadding = 0x%x\n", pptable->UclkSpreadPadding);
dev_info(smu->adev->dev, "UclkSpreadFreq = 0x%x\n", pptable->UclkSpreadFreq);
dev_info(smu->adev->dev, "FclkSpreadEnabled = 0x%x\n", pptable->FclkSpreadEnabled);
@@ -2447,10 +2446,6 @@ static void sienna_cichlid_dump_pptable(struct smu_context *smu)
dev_info(smu->adev->dev, "BoardReserved[8] = 0x%x\n", pptable->BoardReserved[8]);
dev_info(smu->adev->dev, "BoardReserved[9] = 0x%x\n", pptable->BoardReserved[9]);
dev_info(smu->adev->dev, "BoardReserved[10] = 0x%x\n", pptable->BoardReserved[10]);
- dev_info(smu->adev->dev, "BoardReserved[11] = 0x%x\n", pptable->BoardReserved[11]);
- dev_info(smu->adev->dev, "BoardReserved[12] = 0x%x\n", pptable->BoardReserved[12]);
- dev_info(smu->adev->dev, "BoardReserved[13] = 0x%x\n", pptable->BoardReserved[13]);
- dev_info(smu->adev->dev, "BoardReserved[14] = 0x%x\n", pptable->BoardReserved[14]);
dev_info(smu->adev->dev, "MmHubPadding[0] = 0x%x\n", pptable->MmHubPadding[0]);
dev_info(smu->adev->dev, "MmHubPadding[1] = 0x%x\n", pptable->MmHubPadding[1]);
--
2.25.1
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next prev parent reply other threads:[~2020-06-24 6:36 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-24 6:35 [PATCH 1/2] drm/amd/powerplay: change method to set board parameters Likun Gao
2020-06-24 6:35 ` Likun Gao [this message]
2020-06-24 13:58 ` Deucher, Alexander
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