From: "Wenhui.Sheng" <Wenhui.Sheng@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Wenhui Sheng <Wenhui.Sheng@amd.com>,
Hawking Zhang <Hawking.Zhang@amd.com>
Subject: [PATCH 2/4] drm/amdgpu: move reg base init forward for soc15
Date: Wed, 24 Jun 2020 22:40:19 +0800 [thread overview]
Message-ID: <20200624144021.4297-2-Wenhui.Sheng@amd.com> (raw)
In-Reply-To: <20200624144021.4297-1-Wenhui.Sheng@amd.com>
From: Wenhui Sheng <Wenhui.Sheng@amd.com>
Init soc15 reg base early enough so we can touch
mailbox related registers in request full access
for sriov before set_ip_blocks, vi&nv arch doesn't
use reg base in virt ops.
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 0a3031fb90f2..21a5e8aa42b3 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -669,12 +669,7 @@ static uint32_t soc15_get_rev_id(struct amdgpu_device *adev)
return adev->nbio.funcs->get_rev_id(adev);
}
-void soc15_set_virt_ops(struct amdgpu_device *adev)
-{
- adev->virt.ops = &xgpu_ai_virt_ops;
-}
-
-int soc15_set_ip_blocks(struct amdgpu_device *adev)
+static void soc15_reg_base_init(struct amdgpu_device *adev)
{
int r;
@@ -686,6 +681,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
vega10_reg_base_init(adev);
break;
case CHIP_RENOIR:
+ /* It's safe to do ip discovery here for Renior,
+ * it doesn't support SRIOV. */
if (amdgpu_discovery) {
r = amdgpu_discovery_reg_base_init(adev);
if (r) {
@@ -702,9 +699,23 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
arct_reg_base_init(adev);
break;
default:
- return -EINVAL;
+ DRM_ERROR("Unsupported asic type: %d!\n", adev->asic_type);
+ break;
}
+}
+void soc15_set_virt_ops(struct amdgpu_device *adev)
+{
+ adev->virt.ops = &xgpu_ai_virt_ops;
+
+ /* init soc15 reg base early enough so we can
+ * request request full access for sriov before
+ * set_ip_blocks. */
+ soc15_reg_base_init(adev);
+}
+
+int soc15_set_ip_blocks(struct amdgpu_device *adev)
+{
if (adev->asic_type == CHIP_VEGA20 || adev->asic_type == CHIP_ARCTURUS)
adev->gmc.xgmi.supported = true;
--
2.17.1
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next prev parent reply other threads:[~2020-06-24 14:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-24 14:40 [PATCH 1/4] drm/amdgpu: request init data in virt detection Wenhui.Sheng
2020-06-24 14:40 ` Wenhui.Sheng [this message]
2020-06-24 14:40 ` [PATCH 3/4] drm/amdgpu: invoke req full access early enough Wenhui.Sheng
2020-06-24 14:40 ` [PATCH 4/4] drm/amdgpu: merge atombios init block Wenhui.Sheng
2020-06-24 14:42 ` Zhang, Hawking
2020-06-24 22:52 [PATCH 1/4] drm/amdgpu: request init data in virt detection Wenhui.Sheng
2020-06-24 22:52 ` [PATCH 2/4] drm/amdgpu: move reg base init forward for soc15 Wenhui.Sheng
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