From: Eryk Brol <eryk.brol@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: eryk.brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>,
Eric Bernstein <Eric.Bernstein@amd.com>,
Bhawanpreet.Lakha@amd.com
Subject: [PATCH 11/11] drm/amd/display: Enable 4 to 1 mpc combine for max detile use
Date: Fri, 26 Jun 2020 12:18:47 -0400 [thread overview]
Message-ID: <20200626161847.16000-12-eryk.brol@amd.com> (raw)
In-Reply-To: <20200626161847.16000-1-eryk.brol@amd.com>
From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
In case of certain display configurations we want to allow max detile
buffer utilization by using 4 to 1 mpc combine
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 24 ++++++++++++-------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 0983bcc25117..e226647088b9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -2102,11 +2102,20 @@ int dcn20_populate_dml_pipes_from_context(
if (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state
== res_ctx->pipe_ctx[i].plane_state) {
struct pipe_ctx *first_pipe = res_ctx->pipe_ctx[i].top_pipe;
+ int split_idx = 0;
while (first_pipe->top_pipe && first_pipe->top_pipe->plane_state
- == res_ctx->pipe_ctx[i].plane_state)
+ == res_ctx->pipe_ctx[i].plane_state) {
first_pipe = first_pipe->top_pipe;
- pipes[pipe_cnt].pipe.src.hsplit_grp = first_pipe->pipe_idx;
+ split_idx++;
+ }
+ /* Treat 4to1 mpc combine as an mpo of 2 2-to-1 combines */
+ if (split_idx == 0)
+ pipes[pipe_cnt].pipe.src.hsplit_grp = first_pipe->pipe_idx;
+ else if (split_idx == 1)
+ pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx;
+ else if (split_idx == 2)
+ pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].top_pipe->pipe_idx;
} else if (res_ctx->pipe_ctx[i].prev_odm_pipe) {
struct pipe_ctx *first_pipe = res_ctx->pipe_ctx[i].prev_odm_pipe;
@@ -2258,7 +2267,7 @@ int dcn20_populate_dml_pipes_from_context(
|| (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state == pln)
|| pipes[pipe_cnt].pipe.dest.odm_combine != dm_odm_combine_mode_disabled;
- /* stereo is never split, nor odm combine */
+ /* stereo is not split */
if (pln->stereo_format == PLANE_STEREO_FORMAT_SIDE_BY_SIDE ||
pln->stereo_format == PLANE_STEREO_FORMAT_TOP_AND_BOTTOM) {
pipes[pipe_cnt].pipe.src.is_hsplit = false;
@@ -2721,12 +2730,11 @@ int dcn20_validate_apply_pipe_split_flags(
if (!context->res_ctx.pipe_ctx[i].stream)
continue;
- if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] > 1) {
- if (split4mpc)
- split[i] = 4;
- else
+ if (split4mpc || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 4)
+ split[i] = 4;
+ else if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 2)
split[i] = 2;
- }
+
if ((pipe->stream->view_format ==
VIEW_3D_FORMAT_SIDE_BY_SIDE ||
pipe->stream->view_format ==
--
2.25.1
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prev parent reply other threads:[~2020-06-26 16:20 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-26 16:18 [PATCH 00/11] DC Patches June 29, 2020 Eryk Brol
2020-06-26 16:18 ` [PATCH 01/11] drm/amd/display: Initialize psr debug flags to 0 Eryk Brol
2020-06-26 16:18 ` [PATCH 02/11] drm/amd/display: Preserve gpu memory allocation for life of dc Eryk Brol
2020-06-26 16:18 ` [PATCH 03/11] drm/amd/display: [FW Promotion] Release 1.0.20 Eryk Brol
2020-06-26 16:18 ` [PATCH 04/11] drm/amd/display: Handle SMU msg response Eryk Brol
2020-06-26 16:48 ` Alex Deucher
2020-06-26 17:07 ` Kazlauskas, Nicholas
2020-06-26 16:18 ` [PATCH 05/11] drm/amd/display: check dpcd read status of DP_DOWNSTREAM_PORT_0 Eryk Brol
2020-06-26 16:18 ` [PATCH 06/11] drm/amd/display: [FW Promotion] Release 1.0.21 Eryk Brol
2020-06-26 16:18 ` [PATCH 07/11] drm/amd/display: Fix incorrect rounding for 10Hz refresh range Eryk Brol
2020-06-26 16:18 ` [PATCH 08/11] drm/amd/display: [FW Promotion] Release 1.0.22 Eryk Brol
2020-06-26 16:18 ` [PATCH 09/11] drm/amd/display: Add register key and status for edid Eryk Brol
2020-06-26 16:18 ` [PATCH 10/11] drm/amd/display: 3.2.92 Eryk Brol
2020-06-26 16:18 ` Eryk Brol [this message]
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