* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-12 12:57 Roy Sun 2021-04-12 12:57 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-12 12:57 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..4e5d8d4af010 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-12 12:57 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-12 12:57 ` Roy Sun 2021-04-12 13:09 ` Christian König 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-12 12:57 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 207 +++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 50 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 21 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 35 ++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + 10 files changed, 325 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 616c85a01299..c2338a0dd1f0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 4bcc03c4c6c5..07aed377dec8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1691,6 +1691,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..b6523fb141c2 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,207 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +uint64_t amdgpu_get_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct amdgpu_ctx_entity *centity; + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id, i; + uint64_t now, t1, t2; + uint64_t total = 0, min = 0; + + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + + idp = &fpriv->ctx_mgr.ctx_handles; + + mutex_lock(&fpriv->ctx_mgr.lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); There are 2 lock in this function.Could you give me some suggestion to improve it? Thank you a lot! + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + now = ktime_to_ns(ktime_get()); + t1 = ktime_to_ns(s_fence->scheduled.timestamp); + t2 = !dma_fence_is_signaled(&s_fence->finished) ? + 0 : ktime_to_ns(s_fence->finished.timestamp); + dma_fence_put(fence); + + t1 = ktime_sub(now, t1); + t2 = (t2 == 0) ? 0 : ktime_sub(now, t2); + + total += ktime_sub(t1, t2); + if (t1 > min) + min = t1; + } + + } + + mutex_unlock(&fpriv->ctx_mgr.lock); + + if (elapsed) + *elapsed = min; + + return total; +} + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id) +{ + enum amd_ip_block_type type; + uint32_t count = 0; + int i; + + switch (id) { + case AMDGPU_HW_IP_GFX: + type = AMD_IP_BLOCK_TYPE_GFX; + break; + case AMDGPU_HW_IP_COMPUTE: + type = AMD_IP_BLOCK_TYPE_GFX; + break; + case AMDGPU_HW_IP_DMA: + type = AMD_IP_BLOCK_TYPE_SDMA; + break; + case AMDGPU_HW_IP_UVD: + type = AMD_IP_BLOCK_TYPE_UVD; + break; + case AMDGPU_HW_IP_VCE: + type = AMD_IP_BLOCK_TYPE_VCE; + break; + case AMDGPU_HW_IP_UVD_ENC: + type = AMD_IP_BLOCK_TYPE_UVD; + break; + case AMDGPU_HW_IP_VCN_DEC: + case AMDGPU_HW_IP_VCN_ENC: + type = AMD_IP_BLOCK_TYPE_VCN; + break; + case AMDGPU_HW_IP_VCN_JPEG: + type = (amdgpu_device_ip_get_ip_block(adev, + AMD_IP_BLOCK_TYPE_JPEG)) ? + AMD_IP_BLOCK_TYPE_JPEG : AMD_IP_BLOCK_TYPE_VCN; + break; + default: + return 0; + } + + for (i = 0; i < adev->num_ip_blocks; i++) + if (adev->ip_blocks[i].version->type == type && + adev->ip_blocks[i].status.valid && + count < AMDGPU_HW_IP_INSTANCE_MAX_COUNT) + return 1; + return 0; +} + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + uint64_t vram_mem, gtt_mem; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + vram_mem = amdgpu_vm_memory(fpriv, AMDGPU_GEM_DOMAIN_VRAM) + + amdgpu_gem_memory(file, AMDGPU_GEM_DOMAIN_VRAM, fpriv); + gtt_mem = amdgpu_vm_memory(fpriv, AMDGPU_GEM_DOMAIN_GTT) + + amdgpu_gem_memory(file, AMDGPU_GEM_DOMAIN_GTT, fpriv); + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); + + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t enabled = amdgpu_get_ip_count(adev, i); + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + if (enabled) { + + for (idx = 0; idx < count; idx++) { + total = amdgpu_get_fence_usage(fpriv, + i, idx, &min); + + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..06bb15c1c0b7 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + + +struct amdgpu_proc; +struct amdgpu_ctx; +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); + +uint64_t amdgpu_get_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index 311bcdc59eda..6711c7653c40 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -740,6 +740,27 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, return r; } +uint64_t amdgpu_gem_memory(struct drm_file *file, unsigned int domain, + struct amdgpu_fpriv *fpriv) +{ + int id; + struct drm_gem_object *gobj; + uint64_t total = 0; + + spin_lock(&file->table_lock); + idr_for_each_entry(&file->object_idr, gobj, id) { + struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj); + unsigned int m_domain = amdgpu_mem_type_to_domain( + bo->tbo.mem.mem_type); + + if (m_domain == domain) + total += amdgpu_bo_size(bo); + } + spin_unlock(&file->table_lock); + + return total; +} + int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h index 637bf51dbf06..017f034370fe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h @@ -70,5 +70,6 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); - +uint64_t amdgpu_gem_memory(struct drm_file *file, unsigned int domain, + struct amdgpu_fpriv *fpriv); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 39ee88d29cca..b2e774aeab45 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -41,6 +41,7 @@ #include "amdgpu_gem.h" #include "amdgpu_display.h" #include "amdgpu_ras.h" +#include "amdgpu_fdinfo.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index daf926a63c51..073205f2fce2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -3286,6 +3287,40 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm) get_task_comm(vm->task_info.process_name, current->group_leader); } +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, + unsigned int domain) +{ + uint64_t total = 0; + + if (fpriv->vm.process_info) { + struct kgd_mem *mem; + + mutex_lock(&fpriv->vm.process_info->lock); + list_for_each_entry(mem, &fpriv->vm.process_info->kfd_bo_list, + validate_list.head) { + struct amdgpu_bo *bo = mem->bo; + unsigned int m_domain = amdgpu_mem_type_to_domain( + bo->tbo.mem.mem_type); + + if (m_domain == domain) + total += amdgpu_bo_size(bo); + } + + list_for_each_entry(mem, &fpriv->vm.process_info->userptr_valid_list, + validate_list.head) { + struct amdgpu_bo *bo = mem->bo; + unsigned int m_domain = amdgpu_mem_type_to_domain( + bo->tbo.mem.mem_type); + if (m_domain == domain) + total += amdgpu_bo_size(bo); + } + + mutex_unlock(&fpriv->vm.process_info->lock); + } + + return total; +} + /** * amdgpu_vm_handle_fault - graceful handling of VM faults. * @adev: amdgpu device pointer diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 976a12e5a8b9..88e4950dccfd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -447,6 +447,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, unsigned int domain); + #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); #endif -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-12 12:57 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun @ 2021-04-12 13:09 ` Christian König 0 siblings, 0 replies; 22+ messages in thread From: Christian König @ 2021-04-12 13:09 UTC (permalink / raw) To: Roy Sun, amd-gfx; +Cc: David M Nieto Am 12.04.21 um 14:57 schrieb Roy Sun: > Tracking devices, process info and fence info using > /proc/pid/fdinfo > > Signed-off-by: David M Nieto <David.Nieto@amd.com> > Signed-off-by: Roy Sun <Roy.Sun@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 207 +++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 50 +++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 21 +++ > drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h | 3 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 35 ++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + > 10 files changed, 325 insertions(+), 2 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index ee85e8aba636..d216b7ecb5d1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ > amdgpu_fw_attestation.o amdgpu_securedisplay.o > > +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o > + > amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o > > # add asic specific block > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 616c85a01299..c2338a0dd1f0 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -107,6 +107,7 @@ > #include "amdgpu_gfxhub.h" > #include "amdgpu_df.h" > #include "amdgpu_smuio.h" > +#include "amdgpu_fdinfo.h" > > #define MAX_GPU_INSTANCE 16 > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > index 4bcc03c4c6c5..07aed377dec8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > @@ -42,7 +42,7 @@ > #include "amdgpu_irq.h" > #include "amdgpu_dma_buf.h" > #include "amdgpu_sched.h" > - > +#include "amdgpu_fdinfo.h" > #include "amdgpu_amdkfd.h" > > #include "amdgpu_ras.h" > @@ -1691,6 +1691,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { > #ifdef CONFIG_COMPAT > .compat_ioctl = amdgpu_kms_compat_ioctl, > #endif > +#ifdef CONFIG_PROC_FS > + .show_fdinfo = amdgpu_show_fdinfo > +#endif > }; > > int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > new file mode 100644 > index 000000000000..b6523fb141c2 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > @@ -0,0 +1,207 @@ > +// SPDX-License-Identifier: MIT > +/* Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > + > +#include <linux/debugfs.h> > +#include <linux/list.h> > +#include <linux/module.h> > +#include <linux/uaccess.h> > +#include <linux/reboot.h> > +#include <linux/syscalls.h> > + > +#include <drm/amdgpu_drm.h> > +#include <drm/drm_debugfs.h> > + > +#include "amdgpu.h" > +#include "amdgpu_vm.h" > +#include "amdgpu_gem.h" > +#include "amdgpu_fdinfo.h" > + > + > +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { > + [AMDGPU_HW_IP_GFX] = "gfx", > + [AMDGPU_HW_IP_COMPUTE] = "compute", > + [AMDGPU_HW_IP_DMA] = "dma", > + [AMDGPU_HW_IP_UVD] = "dec", > + [AMDGPU_HW_IP_VCE] = "enc", > + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", > + [AMDGPU_HW_IP_VCN_DEC] = "dec", > + [AMDGPU_HW_IP_VCN_ENC] = "enc", > + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", > +}; > + > +uint64_t amdgpu_get_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed) > +{ Well first of all you should move the code into the amdgpu_ctx.c file. > + struct amdgpu_ctx_entity *centity; > + struct idr *idp; > + struct amdgpu_ctx *ctx; > + uint32_t id, i; > + uint64_t now, t1, t2; > + uint64_t total = 0, min = 0; Then you should use ktime_t here, not nanoseconds. > + > + > + if (idx >= AMDGPU_MAX_ENTITY_NUM) > + return 0; > + > + idp = &fpriv->ctx_mgr.ctx_handles; > + > + mutex_lock(&fpriv->ctx_mgr.lock); > + idr_for_each_entry(idp, ctx, id) { > + if (!ctx->entities[hwip][idx]) > + continue; > + > + centity = ctx->entities[hwip][idx]; > + > + for (i = 0; i < amdgpu_sched_jobs; i++) { > + struct dma_fence *fence; > + struct drm_sched_fence *s_fence; > + > + spin_lock(&ctx->ring_lock); > + fence = dma_fence_get(centity->fences[i]); > + spin_unlock(&ctx->ring_lock); > There are 2 lock in this function.Could you give me some suggestion to improve it? > Thank you a lot! I don't get what you are asking here? > + if (!fence) > + continue; > + s_fence = to_drm_sched_fence(fence); > + if (!dma_fence_is_signaled(&s_fence->scheduled)) > + continue; > + now = ktime_to_ns(ktime_get()); The time should probably be determined only once. And drop the ktime_to_ns. > + t1 = ktime_to_ns(s_fence->scheduled.timestamp); Same here and you need to double check if the scheduled fence is signaled or otherwise the timestamp isn't valid. > + t2 = !dma_fence_is_signaled(&s_fence->finished) ? > + 0 : ktime_to_ns(s_fence->finished.timestamp); And you should properly restructure the code here into an if with proper calculation as well. Regards, Christian. > + dma_fence_put(fence); > + > + t1 = ktime_sub(now, t1); > + t2 = (t2 == 0) ? 0 : ktime_sub(now, t2); > + > + total += ktime_sub(t1, t2); > + if (t1 > min) > + min = t1; > + } > + > + } > + > + mutex_unlock(&fpriv->ctx_mgr.lock); > + > + if (elapsed) > + *elapsed = min; > + > + return total; > +} > + > +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id) > +{ > + enum amd_ip_block_type type; > + uint32_t count = 0; > + int i; > + > + switch (id) { > + case AMDGPU_HW_IP_GFX: > + type = AMD_IP_BLOCK_TYPE_GFX; > + break; > + case AMDGPU_HW_IP_COMPUTE: > + type = AMD_IP_BLOCK_TYPE_GFX; > + break; > + case AMDGPU_HW_IP_DMA: > + type = AMD_IP_BLOCK_TYPE_SDMA; > + break; > + case AMDGPU_HW_IP_UVD: > + type = AMD_IP_BLOCK_TYPE_UVD; > + break; > + case AMDGPU_HW_IP_VCE: > + type = AMD_IP_BLOCK_TYPE_VCE; > + break; > + case AMDGPU_HW_IP_UVD_ENC: > + type = AMD_IP_BLOCK_TYPE_UVD; > + break; > + case AMDGPU_HW_IP_VCN_DEC: > + case AMDGPU_HW_IP_VCN_ENC: > + type = AMD_IP_BLOCK_TYPE_VCN; > + break; > + case AMDGPU_HW_IP_VCN_JPEG: > + type = (amdgpu_device_ip_get_ip_block(adev, > + AMD_IP_BLOCK_TYPE_JPEG)) ? > + AMD_IP_BLOCK_TYPE_JPEG : AMD_IP_BLOCK_TYPE_VCN; > + break; > + default: > + return 0; > + } > + > + for (i = 0; i < adev->num_ip_blocks; i++) > + if (adev->ip_blocks[i].version->type == type && > + adev->ip_blocks[i].status.valid && > + count < AMDGPU_HW_IP_INSTANCE_MAX_COUNT) > + return 1; > + return 0; > +} > + > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) > +{ > + struct amdgpu_fpriv *fpriv; > + uint32_t bus, dev, fn, i; > + uint64_t vram_mem, gtt_mem; > + struct drm_file *file = f->private_data; > + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); > + > + if (amdgpu_file_to_fpriv(f, &fpriv)) > + return; > + bus = adev->pdev->bus->number; > + dev = PCI_SLOT(adev->pdev->devfn); > + fn = PCI_FUNC(adev->pdev->devfn); > + > + vram_mem = amdgpu_vm_memory(fpriv, AMDGPU_GEM_DOMAIN_VRAM) + > + amdgpu_gem_memory(file, AMDGPU_GEM_DOMAIN_VRAM, fpriv); > + gtt_mem = amdgpu_vm_memory(fpriv, AMDGPU_GEM_DOMAIN_GTT) + > + amdgpu_gem_memory(file, AMDGPU_GEM_DOMAIN_GTT, fpriv); > + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, > + fpriv->vm.pasid); > + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); > + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); > + > + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { > + uint32_t enabled = amdgpu_get_ip_count(adev, i); > + uint32_t count = amdgpu_ctx_num_entities[i]; > + int idx = 0; > + uint64_t total = 0, min = 0; > + uint32_t perc, frac; > + > + if (enabled) { > + > + for (idx = 0; idx < count; idx++) { > + total = amdgpu_get_fence_usage(fpriv, > + i, idx, &min); > + > + if ((total == 0) || (min == 0)) > + continue; > + > + perc = div64_u64(10000 * total, min); > + frac = perc % 100; > + > + seq_printf(m, "%s%d:\t%d.%d%%\n", > + amdgpu_ip_name[i], > + idx, perc/100, frac); > + } > + } > + } > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > new file mode 100644 > index 000000000000..06bb15c1c0b7 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > @@ -0,0 +1,50 @@ > +/* SPDX-License-Identifier: MIT > + * Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > +#ifndef __AMDGPU_SMI_H__ > +#define __AMDGPU_SMI_H__ > + > +#include <linux/idr.h> > +#include <linux/kfifo.h> > +#include <linux/rbtree.h> > +#include <drm/gpu_scheduler.h> > +#include <drm/drm_file.h> > +#include <drm/ttm/ttm_bo_driver.h> > +#include <linux/sched/mm.h> > + > +#include "amdgpu_sync.h" > +#include "amdgpu_ring.h" > +#include "amdgpu_ids.h" > + > + > +struct amdgpu_proc; > +struct amdgpu_ctx; > +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); > + > +uint64_t amdgpu_get_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed); > + > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); > + > +#endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > index 311bcdc59eda..6711c7653c40 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > @@ -740,6 +740,27 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, > return r; > } > > +uint64_t amdgpu_gem_memory(struct drm_file *file, unsigned int domain, > + struct amdgpu_fpriv *fpriv) > +{ > + int id; > + struct drm_gem_object *gobj; > + uint64_t total = 0; > + > + spin_lock(&file->table_lock); > + idr_for_each_entry(&file->object_idr, gobj, id) { > + struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj); > + unsigned int m_domain = amdgpu_mem_type_to_domain( > + bo->tbo.mem.mem_type); > + > + if (m_domain == domain) > + total += amdgpu_bo_size(bo); > + } > + spin_unlock(&file->table_lock); > + > + return total; > +} > + > int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, > struct drm_file *filp) > { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h > index 637bf51dbf06..017f034370fe 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h > @@ -70,5 +70,6 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, > > int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data, > struct drm_file *filp); > - > +uint64_t amdgpu_gem_memory(struct drm_file *file, unsigned int domain, > + struct amdgpu_fpriv *fpriv); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > index 39ee88d29cca..b2e774aeab45 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > @@ -41,6 +41,7 @@ > #include "amdgpu_gem.h" > #include "amdgpu_display.h" > #include "amdgpu_ras.h" > +#include "amdgpu_fdinfo.h" > > void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) > { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > index daf926a63c51..073205f2fce2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > @@ -25,6 +25,7 @@ > * Alex Deucher > * Jerome Glisse > */ > + > #include <linux/dma-fence-array.h> > #include <linux/interval_tree_generic.h> > #include <linux/idr.h> > @@ -3286,6 +3287,40 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm) > get_task_comm(vm->task_info.process_name, current->group_leader); > } > > +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, > + unsigned int domain) > +{ > + uint64_t total = 0; > + > + if (fpriv->vm.process_info) { > + struct kgd_mem *mem; > + > + mutex_lock(&fpriv->vm.process_info->lock); > + list_for_each_entry(mem, &fpriv->vm.process_info->kfd_bo_list, > + validate_list.head) { > + struct amdgpu_bo *bo = mem->bo; > + unsigned int m_domain = amdgpu_mem_type_to_domain( > + bo->tbo.mem.mem_type); > + > + if (m_domain == domain) > + total += amdgpu_bo_size(bo); > + } > + > + list_for_each_entry(mem, &fpriv->vm.process_info->userptr_valid_list, > + validate_list.head) { > + struct amdgpu_bo *bo = mem->bo; > + unsigned int m_domain = amdgpu_mem_type_to_domain( > + bo->tbo.mem.mem_type); > + if (m_domain == domain) > + total += amdgpu_bo_size(bo); > + } > + > + mutex_unlock(&fpriv->vm.process_info->lock); > + } > + > + return total; > +} > + > /** > * amdgpu_vm_handle_fault - graceful handling of VM faults. > * @adev: amdgpu device pointer > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > index 976a12e5a8b9..88e4950dccfd 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > @@ -447,6 +447,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, > struct amdgpu_vm *vm); > void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); > > +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, unsigned int domain); > + > #if defined(CONFIG_DEBUG_FS) > void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); > #endif _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-13 12:14 Roy Sun 2021-04-13 12:14 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-13 12:14 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..4e5d8d4af010 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-13 12:14 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-13 12:14 ` Roy Sun 2021-04-13 12:54 ` Christian König 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-13 12:14 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 59 ++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 149 +++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 21 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 35 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + 12 files changed, 321 insertions(+), 3 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 616c85a01299..c2338a0dd1f0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..8d33571754d9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,62 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +ktime_t amdgpu_ctx_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct amdgpu_ctx_entity *centity; + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id, i; + ktime_t now, t1; + ktime_t total = 0, max = 0; + + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + + idp = &fpriv->ctx_mgr.ctx_handles; + + mutex_lock(&fpriv->ctx_mgr.lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + total += ktime_sub(s_fence->finished.timestamp, t1); + else + total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + if (t1 > max) + max = t1; + } + + } + + mutex_unlock(&fpriv->ctx_mgr.lock); + + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..8ee42f12e5f8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,6 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 4bcc03c4c6c5..07aed377dec8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1691,6 +1691,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..6243b79a335f --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id) +{ + enum amd_ip_block_type type; + uint32_t count = 0; + int i; + + switch (id) { + case AMDGPU_HW_IP_GFX: + type = AMD_IP_BLOCK_TYPE_GFX; + break; + case AMDGPU_HW_IP_COMPUTE: + type = AMD_IP_BLOCK_TYPE_GFX; + break; + case AMDGPU_HW_IP_DMA: + type = AMD_IP_BLOCK_TYPE_SDMA; + break; + case AMDGPU_HW_IP_UVD: + type = AMD_IP_BLOCK_TYPE_UVD; + break; + case AMDGPU_HW_IP_VCE: + type = AMD_IP_BLOCK_TYPE_VCE; + break; + case AMDGPU_HW_IP_UVD_ENC: + type = AMD_IP_BLOCK_TYPE_UVD; + break; + case AMDGPU_HW_IP_VCN_DEC: + case AMDGPU_HW_IP_VCN_ENC: + type = AMD_IP_BLOCK_TYPE_VCN; + break; + case AMDGPU_HW_IP_VCN_JPEG: + type = (amdgpu_device_ip_get_ip_block(adev, + AMD_IP_BLOCK_TYPE_JPEG)) ? + AMD_IP_BLOCK_TYPE_JPEG : AMD_IP_BLOCK_TYPE_VCN; + break; + default: + return 0; + } + + for (i = 0; i < adev->num_ip_blocks; i++) + if (adev->ip_blocks[i].version->type == type && + adev->ip_blocks[i].status.valid && + count < AMDGPU_HW_IP_INSTANCE_MAX_COUNT) + return 1; + return 0; +} + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + uint64_t vram_mem, gtt_mem; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + vram_mem = amdgpu_vm_memory(fpriv, AMDGPU_GEM_DOMAIN_VRAM) + + amdgpu_gem_memory(file, AMDGPU_GEM_DOMAIN_VRAM, fpriv); + gtt_mem = amdgpu_vm_memory(fpriv, AMDGPU_GEM_DOMAIN_GTT) + + amdgpu_gem_memory(file, AMDGPU_GEM_DOMAIN_GTT, fpriv); + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); + + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t enabled = amdgpu_get_ip_count(adev, i); + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + if (enabled) { + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_fence_usage(fpriv, + i, idx, &min); + + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index 311bcdc59eda..6711c7653c40 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -740,6 +740,27 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, return r; } +uint64_t amdgpu_gem_memory(struct drm_file *file, unsigned int domain, + struct amdgpu_fpriv *fpriv) +{ + int id; + struct drm_gem_object *gobj; + uint64_t total = 0; + + spin_lock(&file->table_lock); + idr_for_each_entry(&file->object_idr, gobj, id) { + struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj); + unsigned int m_domain = amdgpu_mem_type_to_domain( + bo->tbo.mem.mem_type); + + if (m_domain == domain) + total += amdgpu_bo_size(bo); + } + spin_unlock(&file->table_lock); + + return total; +} + int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h index 637bf51dbf06..017f034370fe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h @@ -70,5 +70,6 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); - +uint64_t amdgpu_gem_memory(struct drm_file *file, unsigned int domain, + struct amdgpu_fpriv *fpriv); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 39ee88d29cca..b2e774aeab45 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -41,6 +41,7 @@ #include "amdgpu_gem.h" #include "amdgpu_display.h" #include "amdgpu_ras.h" +#include "amdgpu_fdinfo.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index daf926a63c51..073205f2fce2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -3286,6 +3287,40 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm) get_task_comm(vm->task_info.process_name, current->group_leader); } +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, + unsigned int domain) +{ + uint64_t total = 0; + + if (fpriv->vm.process_info) { + struct kgd_mem *mem; + + mutex_lock(&fpriv->vm.process_info->lock); + list_for_each_entry(mem, &fpriv->vm.process_info->kfd_bo_list, + validate_list.head) { + struct amdgpu_bo *bo = mem->bo; + unsigned int m_domain = amdgpu_mem_type_to_domain( + bo->tbo.mem.mem_type); + + if (m_domain == domain) + total += amdgpu_bo_size(bo); + } + + list_for_each_entry(mem, &fpriv->vm.process_info->userptr_valid_list, + validate_list.head) { + struct amdgpu_bo *bo = mem->bo; + unsigned int m_domain = amdgpu_mem_type_to_domain( + bo->tbo.mem.mem_type); + if (m_domain == domain) + total += amdgpu_bo_size(bo); + } + + mutex_unlock(&fpriv->vm.process_info->lock); + } + + return total; +} + /** * amdgpu_vm_handle_fault - graceful handling of VM faults. * @adev: amdgpu device pointer diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 976a12e5a8b9..88e4950dccfd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -447,6 +447,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, unsigned int domain); + #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); #endif -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-13 12:14 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun @ 2021-04-13 12:54 ` Christian König 0 siblings, 0 replies; 22+ messages in thread From: Christian König @ 2021-04-13 12:54 UTC (permalink / raw) To: Roy Sun, amd-gfx; +Cc: David M Nieto Am 13.04.21 um 14:14 schrieb Roy Sun: > Tracking devices, process info and fence info using > /proc/pid/fdinfo > > Signed-off-by: David M Nieto <David.Nieto@amd.com> > Signed-off-by: Roy Sun <Roy.Sun@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 59 ++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 3 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 149 +++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 21 +++ > drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h | 3 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 35 +++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + > 12 files changed, 321 insertions(+), 3 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index ee85e8aba636..d216b7ecb5d1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ > amdgpu_fw_attestation.o amdgpu_securedisplay.o > > +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o > + > amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o > > # add asic specific block > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 616c85a01299..c2338a0dd1f0 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -107,6 +107,7 @@ > #include "amdgpu_gfxhub.h" > #include "amdgpu_df.h" > #include "amdgpu_smuio.h" > +#include "amdgpu_fdinfo.h" > > #define MAX_GPU_INSTANCE 16 > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > index 0350205c4897..8d33571754d9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > @@ -651,3 +651,62 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) > idr_destroy(&mgr->ctx_handles); > mutex_destroy(&mgr->lock); > } > + > +ktime_t amdgpu_ctx_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed) That starts to look better, but please change this function so that it gets a amdgpu_ctx_mgr structure as first parameter and rename it to amdgpu_ctx_mgr_fence_usage. > +{ > + struct amdgpu_ctx_entity *centity; > + struct idr *idp; > + struct amdgpu_ctx *ctx; > + uint32_t id, i; > + ktime_t now, t1; > + ktime_t total = 0, max = 0; > + > + > + if (idx >= AMDGPU_MAX_ENTITY_NUM) > + return 0; > + > + idp = &fpriv->ctx_mgr.ctx_handles; > + > + mutex_lock(&fpriv->ctx_mgr.lock); > + idr_for_each_entry(idp, ctx, id) { Maybe move everything from here till the end of the loop into a separate function. > + if (!ctx->entities[hwip][idx]) > + continue; > + > + centity = ctx->entities[hwip][idx]; > + now = ktime_get(); > + for (i = 0; i < amdgpu_sched_jobs; i++) { > + struct dma_fence *fence; > + struct drm_sched_fence *s_fence; > + > + spin_lock(&ctx->ring_lock); > + fence = dma_fence_get(centity->fences[i]); > + spin_unlock(&ctx->ring_lock); > + if (!fence) > + continue; > + s_fence = to_drm_sched_fence(fence); > + if (!dma_fence_is_signaled(&s_fence->scheduled)) > + continue; > + t1 = s_fence->scheduled.timestamp; > + if (t1 >= now) > + continue; > + if (dma_fence_is_signaled(&s_fence->finished) && > + s_fence->finished.timestamp < now) That is indented to far to the right, the "s_fence..." should be below the "dma_fence..." in the line above. > + total += ktime_sub(s_fence->finished.timestamp, t1); > + else > + total += ktime_sub(now, t1); > + t1 = ktime_sub(now, t1); > + dma_fence_put(fence); > + if (t1 > max) > + max = t1; Please write this as "max = max(max, t1);". > + } > + > + } > + > + mutex_unlock(&fpriv->ctx_mgr.lock); > + > + if (elapsed) > + *elapsed = max; > + > + return total; > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > index f54e10314661..8ee42f12e5f8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > @@ -87,5 +87,6 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); > void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); > long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); > void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); > - > +ktime_t amdgpu_ctx_fence_usage(struct amdgpu_fpriv *fpriv, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed); Please keep the empty line between the declarations and the #endif. > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > index 4bcc03c4c6c5..07aed377dec8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > @@ -42,7 +42,7 @@ > #include "amdgpu_irq.h" > #include "amdgpu_dma_buf.h" > #include "amdgpu_sched.h" > - > +#include "amdgpu_fdinfo.h" > #include "amdgpu_amdkfd.h" > > #include "amdgpu_ras.h" > @@ -1691,6 +1691,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { > #ifdef CONFIG_COMPAT > .compat_ioctl = amdgpu_kms_compat_ioctl, > #endif > +#ifdef CONFIG_PROC_FS > + .show_fdinfo = amdgpu_show_fdinfo > +#endif > }; > > int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > new file mode 100644 > index 000000000000..6243b79a335f > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > @@ -0,0 +1,149 @@ > +// SPDX-License-Identifier: MIT > +/* Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > + > +#include <linux/debugfs.h> > +#include <linux/list.h> > +#include <linux/module.h> > +#include <linux/uaccess.h> > +#include <linux/reboot.h> > +#include <linux/syscalls.h> > + > +#include <drm/amdgpu_drm.h> > +#include <drm/drm_debugfs.h> > + > +#include "amdgpu.h" > +#include "amdgpu_vm.h" > +#include "amdgpu_gem.h" > +#include "amdgpu_ctx.h" > +#include "amdgpu_fdinfo.h" > + > + > +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { > + [AMDGPU_HW_IP_GFX] = "gfx", > + [AMDGPU_HW_IP_COMPUTE] = "compute", > + [AMDGPU_HW_IP_DMA] = "dma", > + [AMDGPU_HW_IP_UVD] = "dec", > + [AMDGPU_HW_IP_VCE] = "enc", > + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", > + [AMDGPU_HW_IP_VCN_DEC] = "dec", > + [AMDGPU_HW_IP_VCN_ENC] = "enc", > + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", > +}; > + > +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id) > +{ > + enum amd_ip_block_type type; > + uint32_t count = 0; > + int i; > + > + switch (id) { > + case AMDGPU_HW_IP_GFX: > + type = AMD_IP_BLOCK_TYPE_GFX; > + break; > + case AMDGPU_HW_IP_COMPUTE: > + type = AMD_IP_BLOCK_TYPE_GFX; > + break; > + case AMDGPU_HW_IP_DMA: > + type = AMD_IP_BLOCK_TYPE_SDMA; > + break; > + case AMDGPU_HW_IP_UVD: > + type = AMD_IP_BLOCK_TYPE_UVD; > + break; > + case AMDGPU_HW_IP_VCE: > + type = AMD_IP_BLOCK_TYPE_VCE; > + break; > + case AMDGPU_HW_IP_UVD_ENC: > + type = AMD_IP_BLOCK_TYPE_UVD; > + break; > + case AMDGPU_HW_IP_VCN_DEC: > + case AMDGPU_HW_IP_VCN_ENC: > + type = AMD_IP_BLOCK_TYPE_VCN; > + break; > + case AMDGPU_HW_IP_VCN_JPEG: > + type = (amdgpu_device_ip_get_ip_block(adev, > + AMD_IP_BLOCK_TYPE_JPEG)) ? > + AMD_IP_BLOCK_TYPE_JPEG : AMD_IP_BLOCK_TYPE_VCN; > + break; > + default: > + return 0; > + } Again, why do you need this? Just expose the raw data you have in the context. > + > + for (i = 0; i < adev->num_ip_blocks; i++) > + if (adev->ip_blocks[i].version->type == type && > + adev->ip_blocks[i].status.valid && > + count < AMDGPU_HW_IP_INSTANCE_MAX_COUNT) > + return 1; > + return 0; > +} > + > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) > +{ > + struct amdgpu_fpriv *fpriv; > + uint32_t bus, dev, fn, i; > + uint64_t vram_mem, gtt_mem; > + struct drm_file *file = f->private_data; > + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); > + > + if (amdgpu_file_to_fpriv(f, &fpriv)) > + return; > + bus = adev->pdev->bus->number; > + dev = PCI_SLOT(adev->pdev->devfn); > + fn = PCI_FUNC(adev->pdev->devfn); > + > + vram_mem = amdgpu_vm_memory(fpriv, AMDGPU_GEM_DOMAIN_VRAM) + > + amdgpu_gem_memory(file, AMDGPU_GEM_DOMAIN_VRAM, fpriv); > + gtt_mem = amdgpu_vm_memory(fpriv, AMDGPU_GEM_DOMAIN_GTT) + > + amdgpu_gem_memory(file, AMDGPU_GEM_DOMAIN_GTT, fpriv); The VRAM and GTT usage should probably be determined in one call to those functions, otherwise they are not really valid. > + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, > + fpriv->vm.pasid); > + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); > + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); > + > + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { > + uint32_t enabled = amdgpu_get_ip_count(adev, i); > + uint32_t count = amdgpu_ctx_num_entities[i]; > + int idx = 0; > + uint64_t total = 0, min = 0; > + uint32_t perc, frac; > + > + if (enabled) { > + > + for (idx = 0; idx < count; idx++) { > + total = amdgpu_ctx_fence_usage(fpriv, > + i, idx, &min); > + > + if ((total == 0) || (min == 0)) > + continue; > + > + perc = div64_u64(10000 * total, min); > + frac = perc % 100; > + > + seq_printf(m, "%s%d:\t%d.%d%%\n", > + amdgpu_ip_name[i], > + idx, perc/100, frac); > + } > + } > + } > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > new file mode 100644 > index 000000000000..41a4c7056729 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > @@ -0,0 +1,43 @@ > +/* SPDX-License-Identifier: MIT > + * Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > +#ifndef __AMDGPU_SMI_H__ > +#define __AMDGPU_SMI_H__ > + > +#include <linux/idr.h> > +#include <linux/kfifo.h> > +#include <linux/rbtree.h> > +#include <drm/gpu_scheduler.h> > +#include <drm/drm_file.h> > +#include <drm/ttm/ttm_bo_driver.h> > +#include <linux/sched/mm.h> > + > +#include "amdgpu_sync.h" > +#include "amdgpu_ring.h" > +#include "amdgpu_ids.h" > + > +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); > + > +#endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > index 311bcdc59eda..6711c7653c40 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > @@ -740,6 +740,27 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, > return r; > } > > +uint64_t amdgpu_gem_memory(struct drm_file *file, unsigned int domain, > + struct amdgpu_fpriv *fpriv) > +{ > + int id; > + struct drm_gem_object *gobj; > + uint64_t total = 0; > + > + spin_lock(&file->table_lock); > + idr_for_each_entry(&file->object_idr, gobj, id) { > + struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj); > + unsigned int m_domain = amdgpu_mem_type_to_domain( > + bo->tbo.mem.mem_type); > + > + if (m_domain == domain) > + total += amdgpu_bo_size(bo); > + } > + spin_unlock(&file->table_lock); BTW: This isn't accurate. The same memory can be opened under multiple handles. Getting this from the VM subsystem would be better. > + > + return total; > +} > + > int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, > struct drm_file *filp) > { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h > index 637bf51dbf06..017f034370fe 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h > @@ -70,5 +70,6 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, > > int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data, > struct drm_file *filp); > - > +uint64_t amdgpu_gem_memory(struct drm_file *file, unsigned int domain, > + struct amdgpu_fpriv *fpriv); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > index 39ee88d29cca..b2e774aeab45 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > @@ -41,6 +41,7 @@ > #include "amdgpu_gem.h" > #include "amdgpu_display.h" > #include "amdgpu_ras.h" > +#include "amdgpu_fdinfo.h" > > void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) > { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > index daf926a63c51..073205f2fce2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > @@ -25,6 +25,7 @@ > * Alex Deucher > * Jerome Glisse > */ > + > #include <linux/dma-fence-array.h> > #include <linux/interval_tree_generic.h> > #include <linux/idr.h> > @@ -3286,6 +3287,40 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm) > get_task_comm(vm->task_info.process_name, current->group_leader); > } > > +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, > + unsigned int domain) > +{ > + uint64_t total = 0; > + > + if (fpriv->vm.process_info) { Please rather use "if (!fpriv->vm.process_info) return" here. Christian. > + struct kgd_mem *mem; > + > + mutex_lock(&fpriv->vm.process_info->lock); > + list_for_each_entry(mem, &fpriv->vm.process_info->kfd_bo_list, > + validate_list.head) { > + struct amdgpu_bo *bo = mem->bo; > + unsigned int m_domain = amdgpu_mem_type_to_domain( > + bo->tbo.mem.mem_type); > + > + if (m_domain == domain) > + total += amdgpu_bo_size(bo); > + } > + > + list_for_each_entry(mem, &fpriv->vm.process_info->userptr_valid_list, > + validate_list.head) { > + struct amdgpu_bo *bo = mem->bo; > + unsigned int m_domain = amdgpu_mem_type_to_domain( > + bo->tbo.mem.mem_type); > + if (m_domain == domain) > + total += amdgpu_bo_size(bo); > + } > + > + mutex_unlock(&fpriv->vm.process_info->lock); > + } > + > + return total; > +} > + > /** > * amdgpu_vm_handle_fault - graceful handling of VM faults. > * @adev: amdgpu device pointer > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > index 976a12e5a8b9..88e4950dccfd 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > @@ -447,6 +447,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, > struct amdgpu_vm *vm); > void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); > > +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, unsigned int domain); > + > #if defined(CONFIG_DEBUG_FS) > void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); > #endif _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-14 13:59 Roy Sun 2021-04-14 13:59 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-14 13:59 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..4e5d8d4af010 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-14 13:59 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-14 13:59 ` Roy Sun 2021-04-14 14:33 ` Christian König 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-14 13:59 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 +++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 91 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17 ++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 + 10 files changed, 227 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 616c85a01299..c2338a0dd1f0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 4bcc03c4c6c5..07aed377dec8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1691,6 +1691,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..104f7194e787 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 39ee88d29cca..b2e774aeab45 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -41,6 +41,7 @@ #include "amdgpu_gem.h" #include "amdgpu_display.h" #include "amdgpu_ras.h" +#include "amdgpu_fdinfo.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index daf926a63c51..23bb9fc2b406 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -3286,6 +3287,22 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm) get_task_comm(vm->task_info.process_name, current->group_leader); } +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, + unsigned int domain) +{ + uint64_t total = 0; + + if (fpriv->vm.process_info) { + struct kgd_mem *mem; + + mutex_lock(&fpriv->vm.process_info->lock); + + mutex_unlock(&fpriv->vm.process_info->lock); + } + + return total; +} + /** * amdgpu_vm_handle_fault - graceful handling of VM faults. * @adev: amdgpu device pointer diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 976a12e5a8b9..b75cb5f416ce 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -447,6 +447,9 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +void amdgpu_vm_get_memory(struct amdgpu_fpriv *fpriv, uint64_t *vram_mem, + uint64_t *gtt_mem); + #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); #endif -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-14 13:59 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun @ 2021-04-14 14:33 ` Christian König 0 siblings, 0 replies; 22+ messages in thread From: Christian König @ 2021-04-14 14:33 UTC (permalink / raw) To: Roy Sun, amd-gfx; +Cc: David M Nieto Am 14.04.21 um 15:59 schrieb Roy Sun: > Tracking devices, process info and fence info using > /proc/pid/fdinfo > > Signed-off-by: David M Nieto <David.Nieto@amd.com> > Signed-off-by: Roy Sun <Roy.Sun@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 +++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 91 ++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17 ++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 + > 10 files changed, 227 insertions(+), 2 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index ee85e8aba636..d216b7ecb5d1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ > amdgpu_fw_attestation.o amdgpu_securedisplay.o > > +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o > + > amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o > > # add asic specific block > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 616c85a01299..c2338a0dd1f0 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -107,6 +107,7 @@ > #include "amdgpu_gfxhub.h" > #include "amdgpu_df.h" > #include "amdgpu_smuio.h" > +#include "amdgpu_fdinfo.h" > > #define MAX_GPU_INSTANCE 16 > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > index 0350205c4897..01fe60fedcbe 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) > idr_destroy(&mgr->ctx_handles); > mutex_destroy(&mgr->lock); > } > + > +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, > + ktime_t *total, ktime_t *max) > +{ > + ktime_t now, t1; > + uint32_t i; > + > + now = ktime_get(); > + for (i = 0; i < amdgpu_sched_jobs; i++) { > + struct dma_fence *fence; > + struct drm_sched_fence *s_fence; > + > + spin_lock(&ctx->ring_lock); > + fence = dma_fence_get(centity->fences[i]); > + spin_unlock(&ctx->ring_lock); > + if (!fence) > + continue; > + s_fence = to_drm_sched_fence(fence); > + if (!dma_fence_is_signaled(&s_fence->scheduled)) > + continue; > + t1 = s_fence->scheduled.timestamp; > + if (t1 >= now) > + continue; > + if (dma_fence_is_signaled(&s_fence->finished) && > + s_fence->finished.timestamp < now) > + *total += ktime_sub(s_fence->finished.timestamp, t1); > + else > + *total += ktime_sub(now, t1); > + t1 = ktime_sub(now, t1); > + dma_fence_put(fence); > + *max = max(t1, *max); > + } > +} > + > +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed) > +{ > + struct idr *idp; > + struct amdgpu_ctx *ctx; > + uint32_t id; > + struct amdgpu_ctx_entity *centity; > + ktime_t total = 0, max = 0; > + > + if (idx >= AMDGPU_MAX_ENTITY_NUM) > + return 0; > + idp = &mgr->ctx_handles; > + mutex_lock(&mgr->lock); > + idr_for_each_entry(idp, ctx, id) { > + if (!ctx->entities[hwip][idx]) > + continue; > + > + centity = ctx->entities[hwip][idx]; > + amdgpu_ctx_fence_time(ctx, centity, &total, &max); > + } > + > + mutex_unlock(&mgr->lock); > + if (elapsed) > + *elapsed = max; > + > + return total; > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > index f54e10314661..10dcf59a5c6b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); > void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); > long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); > void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); > - > +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed); > +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, > + ktime_t *total, ktime_t *max); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > index 4bcc03c4c6c5..07aed377dec8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > @@ -42,7 +42,7 @@ > #include "amdgpu_irq.h" > #include "amdgpu_dma_buf.h" > #include "amdgpu_sched.h" > - > +#include "amdgpu_fdinfo.h" > #include "amdgpu_amdkfd.h" > > #include "amdgpu_ras.h" > @@ -1691,6 +1691,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { > #ifdef CONFIG_COMPAT > .compat_ioctl = amdgpu_kms_compat_ioctl, > #endif > +#ifdef CONFIG_PROC_FS > + .show_fdinfo = amdgpu_show_fdinfo > +#endif > }; > > int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > new file mode 100644 > index 000000000000..104f7194e787 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > @@ -0,0 +1,91 @@ > +// SPDX-License-Identifier: MIT > +/* Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > + > +#include <linux/debugfs.h> > +#include <linux/list.h> > +#include <linux/module.h> > +#include <linux/uaccess.h> > +#include <linux/reboot.h> > +#include <linux/syscalls.h> > + > +#include <drm/amdgpu_drm.h> > +#include <drm/drm_debugfs.h> > + > +#include "amdgpu.h" > +#include "amdgpu_vm.h" > +#include "amdgpu_gem.h" > +#include "amdgpu_ctx.h" > +#include "amdgpu_fdinfo.h" > + > + > +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { > + [AMDGPU_HW_IP_GFX] = "gfx", > + [AMDGPU_HW_IP_COMPUTE] = "compute", > + [AMDGPU_HW_IP_DMA] = "dma", > + [AMDGPU_HW_IP_UVD] = "dec", > + [AMDGPU_HW_IP_VCE] = "enc", > + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", > + [AMDGPU_HW_IP_VCN_DEC] = "dec", > + [AMDGPU_HW_IP_VCN_ENC] = "enc", > + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", > +}; > + > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) > +{ > + struct amdgpu_fpriv *fpriv; > + uint32_t bus, dev, fn, i; > + struct drm_file *file = f->private_data; > + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); > + > + if (amdgpu_file_to_fpriv(f, &fpriv)) > + return; > + bus = adev->pdev->bus->number; > + dev = PCI_SLOT(adev->pdev->devfn); > + fn = PCI_FUNC(adev->pdev->devfn); > + > + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, > + fpriv->vm.pasid); > + > + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { > + uint32_t count = amdgpu_ctx_num_entities[i]; > + int idx = 0; > + uint64_t total = 0, min = 0; > + uint32_t perc, frac; > + > + for (idx = 0; idx < count; idx++) { > + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, > + i, idx, &min); > + if ((total == 0) || (min == 0)) > + continue; > + > + perc = div64_u64(10000 * total, min); > + frac = perc % 100; > + > + seq_printf(m, "%s%d:\t%d.%d%%\n", > + amdgpu_ip_name[i], > + idx, perc/100, frac); > + } > + } > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > new file mode 100644 > index 000000000000..41a4c7056729 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > @@ -0,0 +1,43 @@ > +/* SPDX-License-Identifier: MIT > + * Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > +#ifndef __AMDGPU_SMI_H__ > +#define __AMDGPU_SMI_H__ > + > +#include <linux/idr.h> > +#include <linux/kfifo.h> > +#include <linux/rbtree.h> > +#include <drm/gpu_scheduler.h> > +#include <drm/drm_file.h> > +#include <drm/ttm/ttm_bo_driver.h> > +#include <linux/sched/mm.h> > + > +#include "amdgpu_sync.h" > +#include "amdgpu_ring.h" > +#include "amdgpu_ids.h" > + > +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); > + > +#endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > index 39ee88d29cca..b2e774aeab45 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > @@ -41,6 +41,7 @@ > #include "amdgpu_gem.h" > #include "amdgpu_display.h" > #include "amdgpu_ras.h" > +#include "amdgpu_fdinfo.h" > > void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) > { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > index daf926a63c51..23bb9fc2b406 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > @@ -25,6 +25,7 @@ > * Alex Deucher > * Jerome Glisse > */ > + > #include <linux/dma-fence-array.h> > #include <linux/interval_tree_generic.h> > #include <linux/idr.h> > @@ -3286,6 +3287,22 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm) > get_task_comm(vm->task_info.process_name, current->group_leader); > } > > +uint64_t amdgpu_vm_memory(struct amdgpu_fpriv *fpriv, > + unsigned int domain) > +{ > + uint64_t total = 0; > + > + if (fpriv->vm.process_info) { > + struct kgd_mem *mem; > + > + mutex_lock(&fpriv->vm.process_info->lock); > + > + mutex_unlock(&fpriv->vm.process_info->lock); > + } I was about to give my blessing, but that looks like you have removed something accidentally here. Christian. > + > + return total; > +} > + > /** > * amdgpu_vm_handle_fault - graceful handling of VM faults. > * @adev: amdgpu device pointer > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > index 976a12e5a8b9..b75cb5f416ce 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > @@ -447,6 +447,9 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, > struct amdgpu_vm *vm); > void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); > > +void amdgpu_vm_get_memory(struct amdgpu_fpriv *fpriv, uint64_t *vram_mem, > + uint64_t *gtt_mem); > + > #if defined(CONFIG_DEBUG_FS) > void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); > #endif _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-16 5:04 Roy Sun 2021-04-16 5:04 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-16 5:04 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..4e5d8d4af010 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-16 5:04 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-16 5:04 ` Roy Sun 0 siblings, 0 replies; 22+ messages in thread From: Roy Sun @ 2021-04-16 5:04 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 24 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 + 10 files changed, 239 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 616c85a01299..c2338a0dd1f0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 4bcc03c4c6c5..07aed377dec8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1691,6 +1691,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..781a06101c22 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + uint64_t vram_mem = 0, gtt_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem); + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); + + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 39ee88d29cca..b2e774aeab45 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -41,6 +41,7 @@ #include "amdgpu_gem.h" #include "amdgpu_display.h" #include "amdgpu_ras.h" +#include "amdgpu_fdinfo.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index daf926a63c51..2530c287bb59 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -321,6 +322,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, base->vm = vm; base->bo = bo; base->next = NULL; + INIT_LIST_HEAD(&base->bo_head); INIT_LIST_HEAD(&base->vm_status); if (!bo) @@ -328,6 +330,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, base->next = bo->vm_bo; bo->vm_bo = base; + list_add(&base->bo_head, &vm->bo_list); if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv) return; @@ -2540,6 +2543,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev, spin_lock(&vm->invalidated_lock); list_del(&bo_va->base.vm_status); + list_del(&bo_va->base.bo_head); spin_unlock(&vm->invalidated_lock); list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { @@ -2799,6 +2803,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, spin_lock_init(&vm->invalidated_lock); INIT_LIST_HEAD(&vm->freed); INIT_LIST_HEAD(&vm->done); + INIT_LIST_HEAD(&vm->bo_list); /* create scheduler entities for page table updates */ r = drm_sched_entity_init(&vm->immediate, DRM_SCHED_PRIORITY_NORMAL, @@ -3266,6 +3271,25 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid, spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); } +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem) +{ + struct amdgpu_vm_bo_base *base = &vm->root.base; + + list_for_each_entry(base, &vm->bo_list, bo_head){ + struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo); + if (!bo) + continue; + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == + AMDGPU_GEM_DOMAIN_VRAM) + *vram_mem += amdgpu_bo_size(bo); + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == + AMDGPU_GEM_DOMAIN_GTT) + *gtt_mem += amdgpu_bo_size(bo); + amdgpu_bo_unref(&bo); + } + +} /** * amdgpu_vm_set_task_info - Sets VMs task info. * diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 976a12e5a8b9..978adda64eae 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base { /* protected by spinlock */ struct list_head vm_status; + struct list_head bo_head; /* protected by the BO being reserved */ bool moved; }; @@ -274,6 +275,7 @@ struct amdgpu_vm { struct list_head invalidated; spinlock_t invalidated_lock; + struct list_head bo_list; /* BO mappings freed, but not yet updated in the PT */ struct list_head freed; @@ -447,6 +449,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem); #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); #endif -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-19 6:26 Roy Sun 2021-04-19 6:26 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-19 6:26 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..dc05a20a8ef2 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-19 6:26 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-19 6:26 ` Roy Sun 2021-04-20 8:53 ` Sun, Roy 2021-04-20 9:57 ` Christian König 0 siblings, 2 replies; 22+ messages in thread From: Roy Sun @ 2021-04-19 6:26 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 24 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 + 10 files changed, 239 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..781a06101c22 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + uint64_t vram_mem = 0, gtt_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem); + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); + + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 39ee88d29cca..b2e774aeab45 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -41,6 +41,7 @@ #include "amdgpu_gem.h" #include "amdgpu_display.h" #include "amdgpu_ras.h" +#include "amdgpu_fdinfo.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f95bcda8463f..773acb4437f7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -322,6 +323,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, base->vm = vm; base->bo = bo; base->next = NULL; + INIT_LIST_HEAD(&base->bo_head); INIT_LIST_HEAD(&base->vm_status); if (!bo) @@ -329,6 +331,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, base->next = bo->vm_bo; bo->vm_bo = base; + list_add(&base->bo_head, &vm->bo_list); if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv) return; @@ -2541,6 +2544,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev, spin_lock(&vm->invalidated_lock); list_del(&bo_va->base.vm_status); + list_del(&bo_va->base.bo_head); spin_unlock(&vm->invalidated_lock); list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { @@ -2800,6 +2804,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, spin_lock_init(&vm->invalidated_lock); INIT_LIST_HEAD(&vm->freed); INIT_LIST_HEAD(&vm->done); + INIT_LIST_HEAD(&vm->bo_list); /* create scheduler entities for page table updates */ r = drm_sched_entity_init(&vm->immediate, DRM_SCHED_PRIORITY_NORMAL, @@ -3267,6 +3272,25 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid, spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); } +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem) +{ + struct amdgpu_vm_bo_base *base = &vm->root.base; + + list_for_each_entry(base, &vm->bo_list, bo_head){ + struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo); + if (!bo) + continue; + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == + AMDGPU_GEM_DOMAIN_VRAM) + *vram_mem += amdgpu_bo_size(bo); + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == + AMDGPU_GEM_DOMAIN_GTT) + *gtt_mem += amdgpu_bo_size(bo); + amdgpu_bo_unref(&bo); + } + +} /** * amdgpu_vm_set_task_info - Sets VMs task info. * diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 848e175e99ff..72727117c479 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base { /* protected by spinlock */ struct list_head vm_status; + struct list_head bo_head; /* protected by the BO being reserved */ bool moved; }; @@ -274,6 +275,7 @@ struct amdgpu_vm { struct list_head invalidated; spinlock_t invalidated_lock; + struct list_head bo_list; /* BO mappings freed, but not yet updated in the PT */ struct list_head freed; @@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem); #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); #endif -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* RE: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-19 6:26 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun @ 2021-04-20 8:53 ` Sun, Roy 2021-04-20 9:32 ` Deng, Emily 2021-04-20 9:57 ` Christian König 1 sibling, 1 reply; 22+ messages in thread From: Sun, Roy @ 2021-04-20 8:53 UTC (permalink / raw) To: Sun, Roy, amd-gfx; +Cc: Nieto, David M [AMD Official Use Only - Internal Distribution Only] Ping. Could you help review this patch again? BR Roy -----Original Message----- From: Roy Sun <Roy.Sun@amd.com> Sent: Monday, April 19, 2021 2:26 PM To: amd-gfx@lists.freedesktop.org Cc: Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com> Subject: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 24 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 + 10 files changed, 239 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..781a06101c22 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person +obtaining a + * copy of this software and associated documentation files (the +"Software"), + * to deal in the Software without restriction, including without +limitation + * the rights to use, copy, modify, merge, publish, distribute, +sublicense, + * and/or sell copies of the Software, and to permit persons to whom +the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be +included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT +SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, +DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE +OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) { + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + uint64_t vram_mem = 0, gtt_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem); + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); + + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person +obtaining a + * copy of this software and associated documentation files (the +"Software"), + * to deal in the Software without restriction, including without +limitation + * the rights to use, copy, modify, merge, publish, distribute, +sublicense, + * and/or sell copies of the Software, and to permit persons to whom +the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be +included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT +SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, +DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE +OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); void +amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 39ee88d29cca..b2e774aeab45 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -41,6 +41,7 @@ #include "amdgpu_gem.h" #include "amdgpu_display.h" #include "amdgpu_ras.h" +#include "amdgpu_fdinfo.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f95bcda8463f..773acb4437f7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -322,6 +323,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, base->vm = vm; base->bo = bo; base->next = NULL; + INIT_LIST_HEAD(&base->bo_head); INIT_LIST_HEAD(&base->vm_status); if (!bo) @@ -329,6 +331,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, base->next = bo->vm_bo; bo->vm_bo = base; + list_add(&base->bo_head, &vm->bo_list); if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv) return; @@ -2541,6 +2544,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev, spin_lock(&vm->invalidated_lock); list_del(&bo_va->base.vm_status); + list_del(&bo_va->base.bo_head); spin_unlock(&vm->invalidated_lock); list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { @@ -2800,6 +2804,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, spin_lock_init(&vm->invalidated_lock); INIT_LIST_HEAD(&vm->freed); INIT_LIST_HEAD(&vm->done); + INIT_LIST_HEAD(&vm->bo_list); /* create scheduler entities for page table updates */ r = drm_sched_entity_init(&vm->immediate, DRM_SCHED_PRIORITY_NORMAL, @@ -3267,6 +3272,25 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid, spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); } +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem) +{ + struct amdgpu_vm_bo_base *base = &vm->root.base; + + list_for_each_entry(base, &vm->bo_list, bo_head){ + struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo); + if (!bo) + continue; + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == + AMDGPU_GEM_DOMAIN_VRAM) + *vram_mem += amdgpu_bo_size(bo); + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == + AMDGPU_GEM_DOMAIN_GTT) + *gtt_mem += amdgpu_bo_size(bo); + amdgpu_bo_unref(&bo); + } + +} /** * amdgpu_vm_set_task_info - Sets VMs task info. * diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 848e175e99ff..72727117c479 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base { /* protected by spinlock */ struct list_head vm_status; + struct list_head bo_head; /* protected by the BO being reserved */ bool moved; }; @@ -274,6 +275,7 @@ struct amdgpu_vm { struct list_head invalidated; spinlock_t invalidated_lock; + struct list_head bo_list; /* BO mappings freed, but not yet updated in the PT */ struct list_head freed; @@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem); #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); #endif -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* RE: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-20 8:53 ` Sun, Roy @ 2021-04-20 9:32 ` Deng, Emily 0 siblings, 0 replies; 22+ messages in thread From: Deng, Emily @ 2021-04-20 9:32 UTC (permalink / raw) To: Sun, Roy, Sun, Roy, amd-gfx, Christian König Cc: Wang, Yin, Chang, HaiJun, Kuo, Richard, Nieto, David M [-- Attachment #1: Type: text/plain, Size: 16495 bytes --] Hi Christian, Could you help to review these patches again, thanks. Best wishes Emily Deng >-----Original Message----- >From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Sun, Roy >Sent: Tuesday, April 20, 2021 4:54 PM >To: Sun, Roy <Roy.Sun@amd.com>; amd-gfx@lists.freedesktop.org >Cc: Nieto, David M <David.Nieto@amd.com> >Subject: RE: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface > >[AMD Official Use Only - Internal Distribution Only] > >Ping. >Could you help review this patch again? > >BR >Roy > >-----Original Message----- >From: Roy Sun <Roy.Sun@amd.com> >Sent: Monday, April 19, 2021 2:26 PM >To: amd-gfx@lists.freedesktop.org >Cc: Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com> >Subject: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface > >Tracking devices, process info and fence info using /proc/pid/fdinfo > >Signed-off-by: David M Nieto <David.Nieto@amd.com> >Signed-off-by: Roy Sun <Roy.Sun@amd.com> >--- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 >++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | >43 ++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 24 ++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 + > 10 files changed, 239 insertions(+), 2 deletions(-) create mode 100644 >drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > >diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile >b/drivers/gpu/drm/amd/amdgpu/Makefile >index ee85e8aba636..d216b7ecb5d1 100644 >--- a/drivers/gpu/drm/amd/amdgpu/Makefile >+++ b/drivers/gpu/drm/amd/amdgpu/Makefile >@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o >amdgpu_rap.o \ > amdgpu_fw_attestation.o amdgpu_securedisplay.o > >+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o >+ > amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o > > # add asic specific block >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h >b/drivers/gpu/drm/amd/amdgpu/amdgpu.h >index 125b25a5ce5b..3365feae15e1 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h >@@ -107,6 +107,7 @@ > #include "amdgpu_gfxhub.h" > #include "amdgpu_df.h" > #include "amdgpu_smuio.h" >+#include "amdgpu_fdinfo.h" > > #define MAX_GPU_INSTANCE 16 > >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c >index 0350205c4897..01fe60fedcbe 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c >@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr >*mgr) > idr_destroy(&mgr->ctx_handles); > mutex_destroy(&mgr->lock); > } >+ >+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct >amdgpu_ctx_entity *centity, >+ ktime_t *total, ktime_t *max) >+{ >+ ktime_t now, t1; >+ uint32_t i; >+ >+ now = ktime_get(); >+ for (i = 0; i < amdgpu_sched_jobs; i++) { >+ struct dma_fence *fence; >+ struct drm_sched_fence *s_fence; >+ >+ spin_lock(&ctx->ring_lock); >+ fence = dma_fence_get(centity->fences[i]); >+ spin_unlock(&ctx->ring_lock); >+ if (!fence) >+ continue; >+ s_fence = to_drm_sched_fence(fence); >+ if (!dma_fence_is_signaled(&s_fence->scheduled)) >+ continue; >+ t1 = s_fence->scheduled.timestamp; >+ if (t1 >= now) >+ continue; >+ if (dma_fence_is_signaled(&s_fence->finished) && >+ s_fence->finished.timestamp < now) >+ *total += ktime_sub(s_fence->finished.timestamp, t1); >+ else >+ *total += ktime_sub(now, t1); >+ t1 = ktime_sub(now, t1); >+ dma_fence_put(fence); >+ *max = max(t1, *max); >+ } >+} >+ >+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, >uint32_t hwip, >+ uint32_t idx, uint64_t *elapsed) >+{ >+ struct idr *idp; >+ struct amdgpu_ctx *ctx; >+ uint32_t id; >+ struct amdgpu_ctx_entity *centity; >+ ktime_t total = 0, max = 0; >+ >+ if (idx >= AMDGPU_MAX_ENTITY_NUM) >+ return 0; >+ idp = &mgr->ctx_handles; >+ mutex_lock(&mgr->lock); >+ idr_for_each_entry(idp, ctx, id) { >+ if (!ctx->entities[hwip][idx]) >+ continue; >+ >+ centity = ctx->entities[hwip][idx]; >+ amdgpu_ctx_fence_time(ctx, centity, &total, &max); >+ } >+ >+ mutex_unlock(&mgr->lock); >+ if (elapsed) >+ *elapsed = max; >+ >+ return total; >+} >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h >b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h >index f54e10314661..10dcf59a5c6b 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h >@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); >void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long >amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); >void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); >- >+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, >uint32_t hwip, >+ uint32_t idx, uint64_t *elapsed); >+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct >amdgpu_ctx_entity *centity, >+ ktime_t *total, ktime_t *max); > #endif >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c >index 0369d3532bf0..01603378dbc9 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c >@@ -42,7 +42,7 @@ > #include "amdgpu_irq.h" > #include "amdgpu_dma_buf.h" > #include "amdgpu_sched.h" >- >+#include "amdgpu_fdinfo.h" > #include "amdgpu_amdkfd.h" > > #include "amdgpu_ras.h" >@@ -1692,6 +1692,9 @@ static const struct file_operations >amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT > .compat_ioctl = amdgpu_kms_compat_ioctl, #endif >+#ifdef CONFIG_PROC_FS >+ .show_fdinfo = amdgpu_show_fdinfo >+#endif > }; > > int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git >a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c >new file mode 100644 >index 000000000000..781a06101c22 >--- /dev/null >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c >@@ -0,0 +1,95 @@ >+// SPDX-License-Identifier: MIT >+/* Copyright 2021 Advanced Micro Devices, Inc. >+ * >+ * Permission is hereby granted, free of charge, to any person >+obtaining a >+ * copy of this software and associated documentation files (the >+"Software"), >+ * to deal in the Software without restriction, including without >+limitation >+ * the rights to use, copy, modify, merge, publish, distribute, >+sublicense, >+ * and/or sell copies of the Software, and to permit persons to whom >+the >+ * Software is furnished to do so, subject to the following conditions: >+ * >+ * The above copyright notice and this permission notice shall be >+included in >+ * all copies or substantial portions of the Software. >+ * >+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, >+EXPRESS OR >+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF >+MERCHANTABILITY, >+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO >EVENT >+SHALL >+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, >+DAMAGES OR >+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR >+OTHERWISE, >+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE >USE >+OR >+ * OTHER DEALINGS IN THE SOFTWARE. >+ * >+ * Authors: David Nieto >+ * Roy Sun >+ */ >+ >+#include <linux/debugfs.h> >+#include <linux/list.h> >+#include <linux/module.h> >+#include <linux/uaccess.h> >+#include <linux/reboot.h> >+#include <linux/syscalls.h> >+ >+#include <drm/amdgpu_drm.h> >+#include <drm/drm_debugfs.h> >+ >+#include "amdgpu.h" >+#include "amdgpu_vm.h" >+#include "amdgpu_gem.h" >+#include "amdgpu_ctx.h" >+#include "amdgpu_fdinfo.h" >+ >+ >+static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { >+ [AMDGPU_HW_IP_GFX] = "gfx", >+ [AMDGPU_HW_IP_COMPUTE] = "compute", >+ [AMDGPU_HW_IP_DMA] = "dma", >+ [AMDGPU_HW_IP_UVD] = "dec", >+ [AMDGPU_HW_IP_VCE] = "enc", >+ [AMDGPU_HW_IP_UVD_ENC] = "enc_1", >+ [AMDGPU_HW_IP_VCN_DEC] = "dec", >+ [AMDGPU_HW_IP_VCN_ENC] = "enc", >+ [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", >+}; >+ >+void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) { >+ struct amdgpu_fpriv *fpriv; >+ uint32_t bus, dev, fn, i; >+ uint64_t vram_mem = 0, gtt_mem = 0; >+ struct drm_file *file = f->private_data; >+ struct amdgpu_device *adev = drm_to_adev(file->minor->dev); >+ >+ if (amdgpu_file_to_fpriv(f, &fpriv)) >+ return; >+ bus = adev->pdev->bus->number; >+ dev = PCI_SLOT(adev->pdev->devfn); >+ fn = PCI_FUNC(adev->pdev->devfn); >+ >+ amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem); >+ seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, >+ fpriv->vm.pasid); >+ seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); >+ seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); >+ >+ for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { >+ uint32_t count = amdgpu_ctx_num_entities[i]; >+ int idx = 0; >+ uint64_t total = 0, min = 0; >+ uint32_t perc, frac; >+ >+ for (idx = 0; idx < count; idx++) { >+ total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, >+ i, idx, &min); >+ if ((total == 0) || (min == 0)) >+ continue; >+ >+ perc = div64_u64(10000 * total, min); >+ frac = perc % 100; >+ >+ seq_printf(m, "%s%d:\t%d.%d%%\n", >+ amdgpu_ip_name[i], >+ idx, perc/100, frac); >+ } >+ } >+} >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h >b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h >new file mode 100644 >index 000000000000..41a4c7056729 >--- /dev/null >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h >@@ -0,0 +1,43 @@ >+/* SPDX-License-Identifier: MIT >+ * Copyright 2021 Advanced Micro Devices, Inc. >+ * >+ * Permission is hereby granted, free of charge, to any person >+obtaining a >+ * copy of this software and associated documentation files (the >+"Software"), >+ * to deal in the Software without restriction, including without >+limitation >+ * the rights to use, copy, modify, merge, publish, distribute, >+sublicense, >+ * and/or sell copies of the Software, and to permit persons to whom >+the >+ * Software is furnished to do so, subject to the following conditions: >+ * >+ * The above copyright notice and this permission notice shall be >+included in >+ * all copies or substantial portions of the Software. >+ * >+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, >+EXPRESS OR >+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF >+MERCHANTABILITY, >+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO >EVENT >+SHALL >+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, >+DAMAGES OR >+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR >+OTHERWISE, >+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE >USE >+OR >+ * OTHER DEALINGS IN THE SOFTWARE. >+ * >+ * Authors: David Nieto >+ * Roy Sun >+ */ >+#ifndef __AMDGPU_SMI_H__ >+#define __AMDGPU_SMI_H__ >+ >+#include <linux/idr.h> >+#include <linux/kfifo.h> >+#include <linux/rbtree.h> >+#include <drm/gpu_scheduler.h> >+#include <drm/drm_file.h> >+#include <drm/ttm/ttm_bo_driver.h> >+#include <linux/sched/mm.h> >+ >+#include "amdgpu_sync.h" >+#include "amdgpu_ring.h" >+#include "amdgpu_ids.h" >+ >+uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); void >+amdgpu_show_fdinfo(struct seq_file *m, struct file *f); >+ >+#endif >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >index 39ee88d29cca..b2e774aeab45 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >@@ -41,6 +41,7 @@ > #include "amdgpu_gem.h" > #include "amdgpu_display.h" > #include "amdgpu_ras.h" >+#include "amdgpu_fdinfo.h" > > void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { diff --git >a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c >index f95bcda8463f..773acb4437f7 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c >@@ -25,6 +25,7 @@ > * Alex Deucher > * Jerome Glisse > */ >+ > #include <linux/dma-fence-array.h> > #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -322,6 >+323,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base >*base, > base->vm = vm; > base->bo = bo; > base->next = NULL; >+ INIT_LIST_HEAD(&base->bo_head); > INIT_LIST_HEAD(&base->vm_status); > > if (!bo) >@@ -329,6 +331,7 @@ static void amdgpu_vm_bo_base_init(struct >amdgpu_vm_bo_base *base, > base->next = bo->vm_bo; > bo->vm_bo = base; > >+ list_add(&base->bo_head, &vm->bo_list); > if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv) > return; > >@@ -2541,6 +2544,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device >*adev, > > spin_lock(&vm->invalidated_lock); > list_del(&bo_va->base.vm_status); >+ list_del(&bo_va->base.bo_head); > spin_unlock(&vm->invalidated_lock); > > list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { @@ - >2800,6 +2804,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct >amdgpu_vm *vm, > spin_lock_init(&vm->invalidated_lock); > INIT_LIST_HEAD(&vm->freed); > INIT_LIST_HEAD(&vm->done); >+ INIT_LIST_HEAD(&vm->bo_list); > > /* create scheduler entities for page table updates */ > r = drm_sched_entity_init(&vm->immediate, >DRM_SCHED_PRIORITY_NORMAL, @@ -3267,6 +3272,25 @@ void >amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid, > spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); } > >+void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, >+ uint64_t *gtt_mem) >+{ >+ struct amdgpu_vm_bo_base *base = &vm->root.base; >+ >+ list_for_each_entry(base, &vm->bo_list, bo_head){ >+ struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo); >+ if (!bo) >+ continue; >+ if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) >== >+ AMDGPU_GEM_DOMAIN_VRAM) >+ *vram_mem += amdgpu_bo_size(bo); >+ if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) >== >+ AMDGPU_GEM_DOMAIN_GTT) >+ *gtt_mem += amdgpu_bo_size(bo); >+ amdgpu_bo_unref(&bo); >+ } >+ >+} > /** > * amdgpu_vm_set_task_info - Sets VMs task info. > * >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h >b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h >index 848e175e99ff..72727117c479 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h >@@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base { > /* protected by spinlock */ > struct list_head vm_status; > >+ struct list_head bo_head; > /* protected by the BO being reserved */ > bool moved; > }; >@@ -274,6 +275,7 @@ struct amdgpu_vm { > struct list_head invalidated; > spinlock_t invalidated_lock; > >+ struct list_head bo_list; > /* BO mappings freed, but not yet updated in the PT */ > struct list_head freed; > >@@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct >amdgpu_device *adev, > struct amdgpu_vm *vm); > void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); > >+void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, >+ uint64_t *gtt_mem); > #if defined(CONFIG_DEBUG_FS) > void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); >#endif >-- >2.31.1 >_______________________________________________ >amd-gfx mailing list >amd-gfx@lists.freedesktop.org >https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.fre >edesktop.org%2Fmailman%2Flistinfo%2Famd- >gfx&data=04%7C01%7CEmily.Deng%40amd.com%7Cabab61f43c93486c53e >308d903d9d7fe%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63754 >5056441135860%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI >joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=XopEZtTM >LCpj%2BUD69HmXdNBKHAwCdrvIAJWpt5Xox3g%3D&reserved=0 [-- Attachment #2: winmail.dat --] [-- Type: application/ms-tnef, Size: 22688 bytes --] [-- Attachment #3: Type: text/plain, Size: 154 bytes --] _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-19 6:26 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-20 8:53 ` Sun, Roy @ 2021-04-20 9:57 ` Christian König 1 sibling, 0 replies; 22+ messages in thread From: Christian König @ 2021-04-20 9:57 UTC (permalink / raw) To: Roy Sun, amd-gfx; +Cc: David M Nieto Am 19.04.21 um 08:26 schrieb Roy Sun: > Tracking devices, process info and fence info using > /proc/pid/fdinfo > > Signed-off-by: David M Nieto <David.Nieto@amd.com> > Signed-off-by: Roy Sun <Roy.Sun@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 24 ++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 + > 10 files changed, 239 insertions(+), 2 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index ee85e8aba636..d216b7ecb5d1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ > amdgpu_fw_attestation.o amdgpu_securedisplay.o > > +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o > + > amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o > > # add asic specific block > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 125b25a5ce5b..3365feae15e1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -107,6 +107,7 @@ > #include "amdgpu_gfxhub.h" > #include "amdgpu_df.h" > #include "amdgpu_smuio.h" > +#include "amdgpu_fdinfo.h" > > #define MAX_GPU_INSTANCE 16 > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > index 0350205c4897..01fe60fedcbe 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) > idr_destroy(&mgr->ctx_handles); > mutex_destroy(&mgr->lock); > } > + > +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, > + ktime_t *total, ktime_t *max) > +{ > + ktime_t now, t1; > + uint32_t i; > + > + now = ktime_get(); > + for (i = 0; i < amdgpu_sched_jobs; i++) { > + struct dma_fence *fence; > + struct drm_sched_fence *s_fence; > + > + spin_lock(&ctx->ring_lock); > + fence = dma_fence_get(centity->fences[i]); > + spin_unlock(&ctx->ring_lock); > + if (!fence) > + continue; > + s_fence = to_drm_sched_fence(fence); > + if (!dma_fence_is_signaled(&s_fence->scheduled)) > + continue; > + t1 = s_fence->scheduled.timestamp; > + if (t1 >= now) > + continue; > + if (dma_fence_is_signaled(&s_fence->finished) && > + s_fence->finished.timestamp < now) > + *total += ktime_sub(s_fence->finished.timestamp, t1); > + else > + *total += ktime_sub(now, t1); > + t1 = ktime_sub(now, t1); > + dma_fence_put(fence); > + *max = max(t1, *max); > + } > +} > + > +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed) > +{ > + struct idr *idp; > + struct amdgpu_ctx *ctx; > + uint32_t id; > + struct amdgpu_ctx_entity *centity; > + ktime_t total = 0, max = 0; > + > + if (idx >= AMDGPU_MAX_ENTITY_NUM) > + return 0; > + idp = &mgr->ctx_handles; > + mutex_lock(&mgr->lock); > + idr_for_each_entry(idp, ctx, id) { > + if (!ctx->entities[hwip][idx]) > + continue; > + > + centity = ctx->entities[hwip][idx]; > + amdgpu_ctx_fence_time(ctx, centity, &total, &max); > + } > + > + mutex_unlock(&mgr->lock); > + if (elapsed) > + *elapsed = max; > + > + return total; > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > index f54e10314661..10dcf59a5c6b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); > void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); > long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); > void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); > - > +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed); > +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, > + ktime_t *total, ktime_t *max); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > index 0369d3532bf0..01603378dbc9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > @@ -42,7 +42,7 @@ > #include "amdgpu_irq.h" > #include "amdgpu_dma_buf.h" > #include "amdgpu_sched.h" > - > +#include "amdgpu_fdinfo.h" > #include "amdgpu_amdkfd.h" > > #include "amdgpu_ras.h" > @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { > #ifdef CONFIG_COMPAT > .compat_ioctl = amdgpu_kms_compat_ioctl, > #endif > +#ifdef CONFIG_PROC_FS > + .show_fdinfo = amdgpu_show_fdinfo > +#endif > }; > > int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > new file mode 100644 > index 000000000000..781a06101c22 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > @@ -0,0 +1,95 @@ > +// SPDX-License-Identifier: MIT > +/* Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > + > +#include <linux/debugfs.h> > +#include <linux/list.h> > +#include <linux/module.h> > +#include <linux/uaccess.h> > +#include <linux/reboot.h> > +#include <linux/syscalls.h> > + > +#include <drm/amdgpu_drm.h> > +#include <drm/drm_debugfs.h> > + > +#include "amdgpu.h" > +#include "amdgpu_vm.h" > +#include "amdgpu_gem.h" > +#include "amdgpu_ctx.h" > +#include "amdgpu_fdinfo.h" > + > + > +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { > + [AMDGPU_HW_IP_GFX] = "gfx", > + [AMDGPU_HW_IP_COMPUTE] = "compute", > + [AMDGPU_HW_IP_DMA] = "dma", > + [AMDGPU_HW_IP_UVD] = "dec", > + [AMDGPU_HW_IP_VCE] = "enc", > + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", > + [AMDGPU_HW_IP_VCN_DEC] = "dec", > + [AMDGPU_HW_IP_VCN_ENC] = "enc", > + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", > +}; > + > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) > +{ > + struct amdgpu_fpriv *fpriv; > + uint32_t bus, dev, fn, i; > + uint64_t vram_mem = 0, gtt_mem = 0; > + struct drm_file *file = f->private_data; > + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); > + > + if (amdgpu_file_to_fpriv(f, &fpriv)) > + return; > + bus = adev->pdev->bus->number; > + dev = PCI_SLOT(adev->pdev->devfn); > + fn = PCI_FUNC(adev->pdev->devfn); > + > + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem); > + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, > + fpriv->vm.pasid); > + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); > + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); > + > + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { > + uint32_t count = amdgpu_ctx_num_entities[i]; > + int idx = 0; > + uint64_t total = 0, min = 0; > + uint32_t perc, frac; > + > + for (idx = 0; idx < count; idx++) { > + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, > + i, idx, &min); > + if ((total == 0) || (min == 0)) > + continue; > + > + perc = div64_u64(10000 * total, min); > + frac = perc % 100; > + > + seq_printf(m, "%s%d:\t%d.%d%%\n", > + amdgpu_ip_name[i], > + idx, perc/100, frac); > + } > + } > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > new file mode 100644 > index 000000000000..41a4c7056729 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > @@ -0,0 +1,43 @@ > +/* SPDX-License-Identifier: MIT > + * Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > +#ifndef __AMDGPU_SMI_H__ > +#define __AMDGPU_SMI_H__ > + > +#include <linux/idr.h> > +#include <linux/kfifo.h> > +#include <linux/rbtree.h> > +#include <drm/gpu_scheduler.h> > +#include <drm/drm_file.h> > +#include <drm/ttm/ttm_bo_driver.h> > +#include <linux/sched/mm.h> > + > +#include "amdgpu_sync.h" > +#include "amdgpu_ring.h" > +#include "amdgpu_ids.h" > + > +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); > + > +#endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > index 39ee88d29cca..b2e774aeab45 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c > @@ -41,6 +41,7 @@ > #include "amdgpu_gem.h" > #include "amdgpu_display.h" > #include "amdgpu_ras.h" > +#include "amdgpu_fdinfo.h" > > void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) > { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > index f95bcda8463f..773acb4437f7 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > @@ -25,6 +25,7 @@ > * Alex Deucher > * Jerome Glisse > */ > + > #include <linux/dma-fence-array.h> > #include <linux/interval_tree_generic.h> > #include <linux/idr.h> > @@ -322,6 +323,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, > base->vm = vm; > base->bo = bo; > base->next = NULL; > + INIT_LIST_HEAD(&base->bo_head); > INIT_LIST_HEAD(&base->vm_status); > > if (!bo) > @@ -329,6 +331,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, > base->next = bo->vm_bo; > bo->vm_bo = base; > > + list_add(&base->bo_head, &vm->bo_list); > if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv) > return; > > @@ -2541,6 +2544,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev, > > spin_lock(&vm->invalidated_lock); > list_del(&bo_va->base.vm_status); > + list_del(&bo_va->base.bo_head); > spin_unlock(&vm->invalidated_lock); > > list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { > @@ -2800,6 +2804,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, > spin_lock_init(&vm->invalidated_lock); > INIT_LIST_HEAD(&vm->freed); > INIT_LIST_HEAD(&vm->done); > + INIT_LIST_HEAD(&vm->bo_list); > > /* create scheduler entities for page table updates */ > r = drm_sched_entity_init(&vm->immediate, DRM_SCHED_PRIORITY_NORMAL, > @@ -3267,6 +3272,25 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid, > spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); > } > > +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, > + uint64_t *gtt_mem) > +{ > + struct amdgpu_vm_bo_base *base = &vm->root.base; > + > + list_for_each_entry(base, &vm->bo_list, bo_head){ > + struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo); > + if (!bo) > + continue; > + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == > + AMDGPU_GEM_DOMAIN_VRAM) > + *vram_mem += amdgpu_bo_size(bo); > + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == > + AMDGPU_GEM_DOMAIN_GTT) > + *gtt_mem += amdgpu_bo_size(bo); > + amdgpu_bo_unref(&bo); > + } > + > +} > /** > * amdgpu_vm_set_task_info - Sets VMs task info. > * > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > index 848e175e99ff..72727117c479 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > @@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base { > /* protected by spinlock */ > struct list_head vm_status; > > + struct list_head bo_head; That is a clear NAK, we already have the status list and you are just duplicating that. See amdgpu_debugfs_vm_bo_info() how to use it how to use it. Regards, Christian. > /* protected by the BO being reserved */ > bool moved; > }; > @@ -274,6 +275,7 @@ struct amdgpu_vm { > struct list_head invalidated; > spinlock_t invalidated_lock; > > + struct list_head bo_list; > /* BO mappings freed, but not yet updated in the PT */ > struct list_head freed; > > @@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, > struct amdgpu_vm *vm); > void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); > > +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, > + uint64_t *gtt_mem); > #if defined(CONFIG_DEBUG_FS) > void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); > #endif _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-20 11:51 Roy Sun 2021-04-20 11:51 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-20 11:51 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..dc05a20a8ef2 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-20 11:51 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-20 11:51 ` Roy Sun 2021-04-20 12:02 ` Christian König 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-20 11:51 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 92 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 21 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 + 10 files changed, 233 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..56ad1e819822 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + uint64_t vram_mem = 0, gtt_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_debugfs_vm_bo_info(&fpriv->vm, m); + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 39ee88d29cca..b2e774aeab45 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -41,6 +41,7 @@ #include "amdgpu_gem.h" #include "amdgpu_display.h" #include "amdgpu_ras.h" +#include "amdgpu_fdinfo.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f95bcda8463f..404f5d99ee20 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -3267,6 +3268,26 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid, spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); } +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem) +{ + struct amdgpu_bo_va *bo_va, *tmp; + struct amdgpu_vm_bo_base *base = &vm->root.base; + + list_for_each_entry(base, &vm->bo_list, bo_head){ + struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo); + if (!bo) + continue; + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == + AMDGPU_GEM_DOMAIN_VRAM) + *vram_mem += amdgpu_bo_size(bo); + if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) == + AMDGPU_GEM_DOMAIN_GTT) + *gtt_mem += amdgpu_bo_size(bo); + amdgpu_bo_unref(&bo); + } + +} /** * amdgpu_vm_set_task_info - Sets VMs task info. * diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 848e175e99ff..72727117c479 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base { /* protected by spinlock */ struct list_head vm_status; + struct list_head bo_head; /* protected by the BO being reserved */ bool moved; }; @@ -274,6 +275,7 @@ struct amdgpu_vm { struct list_head invalidated; spinlock_t invalidated_lock; + struct list_head bo_list; /* BO mappings freed, but not yet updated in the PT */ struct list_head freed; @@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem); #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); #endif -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-20 11:51 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun @ 2021-04-20 12:02 ` Christian König 0 siblings, 0 replies; 22+ messages in thread From: Christian König @ 2021-04-20 12:02 UTC (permalink / raw) To: Roy Sun, amd-gfx; +Cc: David M Nieto Am 20.04.21 um 13:51 schrieb Roy Sun: > [SNIP] > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > index 848e175e99ff..72727117c479 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > @@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base { > /* protected by spinlock */ > struct list_head vm_status; > > + struct list_head bo_head; Well I'm repeating myself. This is a no-go. You already have the same information in the VM state machine, see function amdgpu_debugfs_vm_bo_info(). Christian. > /* protected by the BO being reserved */ > bool moved; > }; > @@ -274,6 +275,7 @@ struct amdgpu_vm { > struct list_head invalidated; > spinlock_t invalidated_lock; > > + struct list_head bo_list; > /* BO mappings freed, but not yet updated in the PT */ > struct list_head freed; > > @@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, > struct amdgpu_vm *vm); > void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); > > +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, > + uint64_t *gtt_mem); > #if defined(CONFIG_DEBUG_FS) > void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); > #endif _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-21 3:46 Roy Sun 2021-04-21 3:46 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-21 3:46 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..dc05a20a8ef2 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-21 3:46 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-21 3:46 ` Roy Sun 2021-04-21 4:35 ` Nieto, David M 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-21 3:46 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 92 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 + 8 files changed, 208 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..56ad1e819822 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + uint64_t vram_mem = 0, gtt_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_debugfs_vm_bo_info(&fpriv->vm, m); + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f95bcda8463f..3c7390727edf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-21 3:46 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun @ 2021-04-21 4:35 ` Nieto, David M 0 siblings, 0 replies; 22+ messages in thread From: Nieto, David M @ 2021-04-21 4:35 UTC (permalink / raw) To: Sun, Roy, amd-gfx [-- Attachment #1.1: Type: text/plain, Size: 12826 bytes --] [AMD Official Use Only - Internal Distribution Only] I think we should probably add the pci domain to the bdf to match the format in the kernel + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); you can get it with pci_domain_nr<https://elixir.bootlin.com/linux/latest/C/ident/pci_domain_nr>(pdev->bus<https://elixir.bootlin.com/linux/latest/C/ident/bus>) David ________________________________ From: Roy Sun <Roy.Sun@amd.com> Sent: Tuesday, April 20, 2021 8:46 PM To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org> Cc: Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com> Subject: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 92 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 + 8 files changed, 208 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..56ad1e819822 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i; + uint64_t vram_mem = 0, gtt_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_debugfs_vm_bo_info(&fpriv->vm, m); + seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn, + fpriv->vm.pasid); + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f95bcda8463f..3c7390727edf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> -- 2.31.1 [-- Attachment #1.2: Type: text/html, Size: 25437 bytes --] [-- Attachment #2: Type: text/plain, Size: 154 bytes --] _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-21 8:03 Roy Sun 2021-04-21 8:03 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-21 8:03 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..dc05a20a8ef2 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-21 8:03 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-21 8:03 ` Roy Sun 0 siblings, 0 replies; 22+ messages in thread From: Roy Sun @ 2021-04-21 8:03 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 92 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 + 8 files changed, 208 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..7c4b4b1b5248 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i, domain; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + domain = pci_domain_nr(adev->pdev->bus); + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_debugfs_vm_bo_info(&fpriv->vm, m); + seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus, + dev, fn, fpriv->vm.pasid); + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f95bcda8463f..3c7390727edf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-23 9:19 Roy Sun 2021-04-23 9:19 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-23 9:19 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- This is the patch that just return the memory size. drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..dc05a20a8ef2 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-23 9:19 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-23 9:19 ` Roy Sun 2021-04-23 9:32 ` Christian König 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-23 9:19 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 96 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 45 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + 11 files changed, 280 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..f4ab7c65517e --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i, domain; + uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + domain = pci_domain_nr(adev->pdev->bus); + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem, &cpu_mem); + seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus, + dev, fn, fpriv->vm.pasid); + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); + seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL); + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 1345f7eba011..de728632b5df 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -1304,6 +1304,26 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, trace_amdgpu_bo_move(abo, new_mem->mem_type, old_mem->mem_type); } +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem) +{ + unsigned int domain; + + domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); + switch (domain) { + case AMDGPU_GEM_DOMAIN_VRAM: + *vram_mem += amdgpu_bo_size(bo); + break; + case AMDGPU_GEM_DOMAIN_GTT: + *gtt_mem += amdgpu_bo_size(bo); + break; + case AMDGPU_GEM_DOMAIN_CPU: + default: + *cpu_mem += amdgpu_bo_size(bo); + break; + } +} + /** * amdgpu_bo_release_notify - notification about a BO being released * @bo: pointer to a buffer object diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h index 973c88bdf37b..659406475c2c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h @@ -304,6 +304,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr); u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo); u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo); int amdgpu_bo_validate(struct amdgpu_bo *bo); +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem); int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow, struct dma_fence **fence); uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f95bcda8463f..7c7a387c2285 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -1718,6 +1719,50 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, return r; } +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem) +{ + struct amdgpu_bo_va *bo_va, *tmp; + + list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + spin_lock(&vm->invalidated_lock); + list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + spin_unlock(&vm->invalidated_lock); +} /** * amdgpu_vm_bo_update - update all BO mappings in the vm page table * diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 848e175e99ff..7f670d603895 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -457,6 +457,8 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm); void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem); #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-23 9:19 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun @ 2021-04-23 9:32 ` Christian König 0 siblings, 0 replies; 22+ messages in thread From: Christian König @ 2021-04-23 9:32 UTC (permalink / raw) To: Roy Sun, amd-gfx; +Cc: David M Nieto Am 23.04.21 um 11:19 schrieb Roy Sun: > Tracking devices, process info and fence info using > /proc/pid/fdinfo > > Signed-off-by: David M Nieto <David.Nieto@amd.com> > Signed-off-by: Roy Sun <Roy.Sun@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 96 ++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 +++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 45 ++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + > 11 files changed, 280 insertions(+), 2 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index ee85e8aba636..d216b7ecb5d1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ > amdgpu_fw_attestation.o amdgpu_securedisplay.o > > +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o > + > amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o > > # add asic specific block > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 125b25a5ce5b..3365feae15e1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -107,6 +107,7 @@ > #include "amdgpu_gfxhub.h" > #include "amdgpu_df.h" > #include "amdgpu_smuio.h" > +#include "amdgpu_fdinfo.h" > > #define MAX_GPU_INSTANCE 16 > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > index 0350205c4897..01fe60fedcbe 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) > idr_destroy(&mgr->ctx_handles); > mutex_destroy(&mgr->lock); > } > + > +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, > + ktime_t *total, ktime_t *max) > +{ > + ktime_t now, t1; > + uint32_t i; > + > + now = ktime_get(); > + for (i = 0; i < amdgpu_sched_jobs; i++) { > + struct dma_fence *fence; > + struct drm_sched_fence *s_fence; > + > + spin_lock(&ctx->ring_lock); > + fence = dma_fence_get(centity->fences[i]); > + spin_unlock(&ctx->ring_lock); > + if (!fence) > + continue; > + s_fence = to_drm_sched_fence(fence); > + if (!dma_fence_is_signaled(&s_fence->scheduled)) > + continue; > + t1 = s_fence->scheduled.timestamp; > + if (t1 >= now) > + continue; > + if (dma_fence_is_signaled(&s_fence->finished) && > + s_fence->finished.timestamp < now) > + *total += ktime_sub(s_fence->finished.timestamp, t1); > + else > + *total += ktime_sub(now, t1); > + t1 = ktime_sub(now, t1); > + dma_fence_put(fence); > + *max = max(t1, *max); > + } > +} > + > +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed) > +{ > + struct idr *idp; > + struct amdgpu_ctx *ctx; > + uint32_t id; > + struct amdgpu_ctx_entity *centity; > + ktime_t total = 0, max = 0; > + > + if (idx >= AMDGPU_MAX_ENTITY_NUM) > + return 0; > + idp = &mgr->ctx_handles; > + mutex_lock(&mgr->lock); > + idr_for_each_entry(idp, ctx, id) { > + if (!ctx->entities[hwip][idx]) > + continue; > + > + centity = ctx->entities[hwip][idx]; > + amdgpu_ctx_fence_time(ctx, centity, &total, &max); > + } > + > + mutex_unlock(&mgr->lock); > + if (elapsed) > + *elapsed = max; > + > + return total; > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > index f54e10314661..10dcf59a5c6b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); > void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); > long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); > void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); > - > +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed); > +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, > + ktime_t *total, ktime_t *max); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > index 0369d3532bf0..01603378dbc9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > @@ -42,7 +42,7 @@ > #include "amdgpu_irq.h" > #include "amdgpu_dma_buf.h" > #include "amdgpu_sched.h" > - > +#include "amdgpu_fdinfo.h" > #include "amdgpu_amdkfd.h" > > #include "amdgpu_ras.h" > @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { > #ifdef CONFIG_COMPAT > .compat_ioctl = amdgpu_kms_compat_ioctl, > #endif > +#ifdef CONFIG_PROC_FS > + .show_fdinfo = amdgpu_show_fdinfo > +#endif > }; > > int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > new file mode 100644 > index 000000000000..f4ab7c65517e > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > @@ -0,0 +1,96 @@ > +// SPDX-License-Identifier: MIT > +/* Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > + > +#include <linux/debugfs.h> > +#include <linux/list.h> > +#include <linux/module.h> > +#include <linux/uaccess.h> > +#include <linux/reboot.h> > +#include <linux/syscalls.h> > + > +#include <drm/amdgpu_drm.h> > +#include <drm/drm_debugfs.h> > + > +#include "amdgpu.h" > +#include "amdgpu_vm.h" > +#include "amdgpu_gem.h" > +#include "amdgpu_ctx.h" > +#include "amdgpu_fdinfo.h" > + > + > +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { > + [AMDGPU_HW_IP_GFX] = "gfx", > + [AMDGPU_HW_IP_COMPUTE] = "compute", > + [AMDGPU_HW_IP_DMA] = "dma", > + [AMDGPU_HW_IP_UVD] = "dec", > + [AMDGPU_HW_IP_VCE] = "enc", > + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", > + [AMDGPU_HW_IP_VCN_DEC] = "dec", > + [AMDGPU_HW_IP_VCN_ENC] = "enc", > + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", > +}; > + > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) > +{ > + struct amdgpu_fpriv *fpriv; > + uint32_t bus, dev, fn, i, domain; > + uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0; > + struct drm_file *file = f->private_data; > + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); > + > + if (amdgpu_file_to_fpriv(f, &fpriv)) > + return; > + bus = adev->pdev->bus->number; > + domain = pci_domain_nr(adev->pdev->bus); > + dev = PCI_SLOT(adev->pdev->devfn); > + fn = PCI_FUNC(adev->pdev->devfn); > + > + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem, &cpu_mem); You need to grab the VM lock before calling this. Something like amdgpu_bo_reserve(vm->root.bo, false)/amdgpu_bo_unreserve(vm->root.bo) should do it. Apart from that looks good to me. Regards, Christian. > + seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus, > + dev, fn, fpriv->vm.pasid); > + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); > + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); > + seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL); > + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { > + uint32_t count = amdgpu_ctx_num_entities[i]; > + int idx = 0; > + uint64_t total = 0, min = 0; > + uint32_t perc, frac; > + > + for (idx = 0; idx < count; idx++) { > + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, > + i, idx, &min); > + if ((total == 0) || (min == 0)) > + continue; > + > + perc = div64_u64(10000 * total, min); > + frac = perc % 100; > + > + seq_printf(m, "%s%d:\t%d.%d%%\n", > + amdgpu_ip_name[i], > + idx, perc/100, frac); > + } > + } > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > new file mode 100644 > index 000000000000..41a4c7056729 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > @@ -0,0 +1,43 @@ > +/* SPDX-License-Identifier: MIT > + * Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > +#ifndef __AMDGPU_SMI_H__ > +#define __AMDGPU_SMI_H__ > + > +#include <linux/idr.h> > +#include <linux/kfifo.h> > +#include <linux/rbtree.h> > +#include <drm/gpu_scheduler.h> > +#include <drm/drm_file.h> > +#include <drm/ttm/ttm_bo_driver.h> > +#include <linux/sched/mm.h> > + > +#include "amdgpu_sync.h" > +#include "amdgpu_ring.h" > +#include "amdgpu_ids.h" > + > +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); > + > +#endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index 1345f7eba011..de728632b5df 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -1304,6 +1304,26 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, > trace_amdgpu_bo_move(abo, new_mem->mem_type, old_mem->mem_type); > } > > +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, > + uint64_t *gtt_mem, uint64_t *cpu_mem) > +{ > + unsigned int domain; > + > + domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); > + switch (domain) { > + case AMDGPU_GEM_DOMAIN_VRAM: > + *vram_mem += amdgpu_bo_size(bo); > + break; > + case AMDGPU_GEM_DOMAIN_GTT: > + *gtt_mem += amdgpu_bo_size(bo); > + break; > + case AMDGPU_GEM_DOMAIN_CPU: > + default: > + *cpu_mem += amdgpu_bo_size(bo); > + break; > + } > +} > + > /** > * amdgpu_bo_release_notify - notification about a BO being released > * @bo: pointer to a buffer object > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h > index 973c88bdf37b..659406475c2c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h > @@ -304,6 +304,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr); > u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo); > u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo); > int amdgpu_bo_validate(struct amdgpu_bo *bo); > +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, > + uint64_t *gtt_mem, uint64_t *cpu_mem); > int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow, > struct dma_fence **fence); > uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev, > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > index f95bcda8463f..7c7a387c2285 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > @@ -25,6 +25,7 @@ > * Alex Deucher > * Jerome Glisse > */ > + > #include <linux/dma-fence-array.h> > #include <linux/interval_tree_generic.h> > #include <linux/idr.h> > @@ -1718,6 +1719,50 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, > return r; > } > > +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, > + uint64_t *gtt_mem, uint64_t *cpu_mem) > +{ > + struct amdgpu_bo_va *bo_va, *tmp; > + > + list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + spin_lock(&vm->invalidated_lock); > + list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + spin_unlock(&vm->invalidated_lock); > +} > /** > * amdgpu_vm_bo_update - update all BO mappings in the vm page table > * > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > index 848e175e99ff..7f670d603895 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > @@ -457,6 +457,8 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm); > void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, > struct amdgpu_vm *vm); > void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); > +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, > + uint64_t *gtt_mem, uint64_t *cpu_mem); > > #if defined(CONFIG_DEBUG_FS) > void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-23 10:55 Roy Sun 2021-04-23 10:55 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-23 10:55 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..dc05a20a8ef2 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-23 10:55 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-23 10:55 ` Roy Sun 2021-04-23 11:36 ` Christian König 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-23 10:55 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 98 ++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 45 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + 11 files changed, 282 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..c7d7688bc42e --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i, domain; + uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + + if (amdgpu_file_to_fpriv(f, &fpriv)) + return; + bus = adev->pdev->bus->number; + domain = pci_domain_nr(adev->pdev->bus); + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + amdgpu_bo_reserve(fpriv->vm.root.base.bo, false); + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem, &cpu_mem); + amdgpu_bo_unreserve(fpriv->vm.root.base.bo); + seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus, + dev, fn, fpriv->vm.pasid); + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); + seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL); + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 1345f7eba011..de728632b5df 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -1304,6 +1304,26 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, trace_amdgpu_bo_move(abo, new_mem->mem_type, old_mem->mem_type); } +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem) +{ + unsigned int domain; + + domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); + switch (domain) { + case AMDGPU_GEM_DOMAIN_VRAM: + *vram_mem += amdgpu_bo_size(bo); + break; + case AMDGPU_GEM_DOMAIN_GTT: + *gtt_mem += amdgpu_bo_size(bo); + break; + case AMDGPU_GEM_DOMAIN_CPU: + default: + *cpu_mem += amdgpu_bo_size(bo); + break; + } +} + /** * amdgpu_bo_release_notify - notification about a BO being released * @bo: pointer to a buffer object diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h index 973c88bdf37b..659406475c2c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h @@ -304,6 +304,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr); u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo); u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo); int amdgpu_bo_validate(struct amdgpu_bo *bo); +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem); int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow, struct dma_fence **fence); uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index f95bcda8463f..7c7a387c2285 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -1718,6 +1719,50 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, return r; } +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem) +{ + struct amdgpu_bo_va *bo_va, *tmp; + + list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + spin_lock(&vm->invalidated_lock); + list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + spin_unlock(&vm->invalidated_lock); +} /** * amdgpu_vm_bo_update - update all BO mappings in the vm page table * diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 848e175e99ff..7f670d603895 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -457,6 +457,8 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm); void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem); #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-23 10:55 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun @ 2021-04-23 11:36 ` Christian König 0 siblings, 0 replies; 22+ messages in thread From: Christian König @ 2021-04-23 11:36 UTC (permalink / raw) To: Roy Sun, amd-gfx; +Cc: David M Nieto Am 23.04.21 um 12:55 schrieb Roy Sun: > Tracking devices, process info and fence info using > /proc/pid/fdinfo > > Signed-off-by: David M Nieto <David.Nieto@amd.com> > Signed-off-by: Roy Sun <Roy.Sun@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 98 ++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 +++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 + > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 45 ++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + > 11 files changed, 282 insertions(+), 2 deletions(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index ee85e8aba636..d216b7ecb5d1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ > amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ > amdgpu_fw_attestation.o amdgpu_securedisplay.o > > +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o > + > amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o > > # add asic specific block > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 125b25a5ce5b..3365feae15e1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -107,6 +107,7 @@ > #include "amdgpu_gfxhub.h" > #include "amdgpu_df.h" > #include "amdgpu_smuio.h" > +#include "amdgpu_fdinfo.h" > > #define MAX_GPU_INSTANCE 16 > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > index 0350205c4897..01fe60fedcbe 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c > @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) > idr_destroy(&mgr->ctx_handles); > mutex_destroy(&mgr->lock); > } > + > +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, > + ktime_t *total, ktime_t *max) > +{ > + ktime_t now, t1; > + uint32_t i; > + > + now = ktime_get(); > + for (i = 0; i < amdgpu_sched_jobs; i++) { > + struct dma_fence *fence; > + struct drm_sched_fence *s_fence; > + > + spin_lock(&ctx->ring_lock); > + fence = dma_fence_get(centity->fences[i]); > + spin_unlock(&ctx->ring_lock); > + if (!fence) > + continue; > + s_fence = to_drm_sched_fence(fence); > + if (!dma_fence_is_signaled(&s_fence->scheduled)) > + continue; > + t1 = s_fence->scheduled.timestamp; > + if (t1 >= now) > + continue; > + if (dma_fence_is_signaled(&s_fence->finished) && > + s_fence->finished.timestamp < now) > + *total += ktime_sub(s_fence->finished.timestamp, t1); > + else > + *total += ktime_sub(now, t1); > + t1 = ktime_sub(now, t1); > + dma_fence_put(fence); > + *max = max(t1, *max); > + } > +} > + > +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed) > +{ > + struct idr *idp; > + struct amdgpu_ctx *ctx; > + uint32_t id; > + struct amdgpu_ctx_entity *centity; > + ktime_t total = 0, max = 0; > + > + if (idx >= AMDGPU_MAX_ENTITY_NUM) > + return 0; > + idp = &mgr->ctx_handles; > + mutex_lock(&mgr->lock); > + idr_for_each_entry(idp, ctx, id) { > + if (!ctx->entities[hwip][idx]) > + continue; > + > + centity = ctx->entities[hwip][idx]; > + amdgpu_ctx_fence_time(ctx, centity, &total, &max); > + } > + > + mutex_unlock(&mgr->lock); > + if (elapsed) > + *elapsed = max; > + > + return total; > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > index f54e10314661..10dcf59a5c6b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h > @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); > void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); > long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); > void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); > - > +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, > + uint32_t idx, uint64_t *elapsed); > +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, > + ktime_t *total, ktime_t *max); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > index 0369d3532bf0..01603378dbc9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > @@ -42,7 +42,7 @@ > #include "amdgpu_irq.h" > #include "amdgpu_dma_buf.h" > #include "amdgpu_sched.h" > - > +#include "amdgpu_fdinfo.h" > #include "amdgpu_amdkfd.h" > > #include "amdgpu_ras.h" > @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { > #ifdef CONFIG_COMPAT > .compat_ioctl = amdgpu_kms_compat_ioctl, > #endif > +#ifdef CONFIG_PROC_FS > + .show_fdinfo = amdgpu_show_fdinfo > +#endif > }; > > int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > new file mode 100644 > index 000000000000..c7d7688bc42e > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c > @@ -0,0 +1,98 @@ > +// SPDX-License-Identifier: MIT > +/* Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > + > +#include <linux/debugfs.h> > +#include <linux/list.h> > +#include <linux/module.h> > +#include <linux/uaccess.h> > +#include <linux/reboot.h> > +#include <linux/syscalls.h> > + > +#include <drm/amdgpu_drm.h> > +#include <drm/drm_debugfs.h> > + > +#include "amdgpu.h" > +#include "amdgpu_vm.h" > +#include "amdgpu_gem.h" > +#include "amdgpu_ctx.h" > +#include "amdgpu_fdinfo.h" > + > + > +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { > + [AMDGPU_HW_IP_GFX] = "gfx", > + [AMDGPU_HW_IP_COMPUTE] = "compute", > + [AMDGPU_HW_IP_DMA] = "dma", > + [AMDGPU_HW_IP_UVD] = "dec", > + [AMDGPU_HW_IP_VCE] = "enc", > + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", > + [AMDGPU_HW_IP_VCN_DEC] = "dec", > + [AMDGPU_HW_IP_VCN_ENC] = "enc", > + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", > +}; > + > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) > +{ > + struct amdgpu_fpriv *fpriv; > + uint32_t bus, dev, fn, i, domain; > + uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0; > + struct drm_file *file = f->private_data; > + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); > + > + if (amdgpu_file_to_fpriv(f, &fpriv)) > + return; BTW: Something like this would be better coding style: r = amdgpu_file_... if (r) return; > + bus = adev->pdev->bus->number; > + domain = pci_domain_nr(adev->pdev->bus); > + dev = PCI_SLOT(adev->pdev->devfn); > + fn = PCI_FUNC(adev->pdev->devfn); > + > + amdgpu_bo_reserve(fpriv->vm.root.base.bo, false); You need to check the return value here and abort in case of an error. Christian. > + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem, &cpu_mem); > + amdgpu_bo_unreserve(fpriv->vm.root.base.bo); > + seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus, > + dev, fn, fpriv->vm.pasid); > + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); > + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); > + seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL); > + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { > + uint32_t count = amdgpu_ctx_num_entities[i]; > + int idx = 0; > + uint64_t total = 0, min = 0; > + uint32_t perc, frac; > + > + for (idx = 0; idx < count; idx++) { > + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, > + i, idx, &min); > + if ((total == 0) || (min == 0)) > + continue; > + > + perc = div64_u64(10000 * total, min); > + frac = perc % 100; > + > + seq_printf(m, "%s%d:\t%d.%d%%\n", > + amdgpu_ip_name[i], > + idx, perc/100, frac); > + } > + } > +} > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > new file mode 100644 > index 000000000000..41a4c7056729 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h > @@ -0,0 +1,43 @@ > +/* SPDX-License-Identifier: MIT > + * Copyright 2021 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + * Authors: David Nieto > + * Roy Sun > + */ > +#ifndef __AMDGPU_SMI_H__ > +#define __AMDGPU_SMI_H__ > + > +#include <linux/idr.h> > +#include <linux/kfifo.h> > +#include <linux/rbtree.h> > +#include <drm/gpu_scheduler.h> > +#include <drm/drm_file.h> > +#include <drm/ttm/ttm_bo_driver.h> > +#include <linux/sched/mm.h> > + > +#include "amdgpu_sync.h" > +#include "amdgpu_ring.h" > +#include "amdgpu_ids.h" > + > +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); > +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); > + > +#endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index 1345f7eba011..de728632b5df 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -1304,6 +1304,26 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, > trace_amdgpu_bo_move(abo, new_mem->mem_type, old_mem->mem_type); > } > > +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, > + uint64_t *gtt_mem, uint64_t *cpu_mem) > +{ > + unsigned int domain; > + > + domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); > + switch (domain) { > + case AMDGPU_GEM_DOMAIN_VRAM: > + *vram_mem += amdgpu_bo_size(bo); > + break; > + case AMDGPU_GEM_DOMAIN_GTT: > + *gtt_mem += amdgpu_bo_size(bo); > + break; > + case AMDGPU_GEM_DOMAIN_CPU: > + default: > + *cpu_mem += amdgpu_bo_size(bo); > + break; > + } > +} > + > /** > * amdgpu_bo_release_notify - notification about a BO being released > * @bo: pointer to a buffer object > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h > index 973c88bdf37b..659406475c2c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h > @@ -304,6 +304,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr); > u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo); > u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo); > int amdgpu_bo_validate(struct amdgpu_bo *bo); > +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, > + uint64_t *gtt_mem, uint64_t *cpu_mem); > int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow, > struct dma_fence **fence); > uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev, > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > index f95bcda8463f..7c7a387c2285 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c > @@ -25,6 +25,7 @@ > * Alex Deucher > * Jerome Glisse > */ > + > #include <linux/dma-fence-array.h> > #include <linux/interval_tree_generic.h> > #include <linux/idr.h> > @@ -1718,6 +1719,50 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, > return r; > } > > +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, > + uint64_t *gtt_mem, uint64_t *cpu_mem) > +{ > + struct amdgpu_bo_va *bo_va, *tmp; > + > + list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + spin_lock(&vm->invalidated_lock); > + list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) { > + if (!bo_va->base.bo) > + continue; > + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, > + gtt_mem, cpu_mem); > + } > + spin_unlock(&vm->invalidated_lock); > +} > /** > * amdgpu_vm_bo_update - update all BO mappings in the vm page table > * > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > index 848e175e99ff..7f670d603895 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h > @@ -457,6 +457,8 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm); > void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, > struct amdgpu_vm *vm); > void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); > +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, > + uint64_t *gtt_mem, uint64_t *cpu_mem); > > #if defined(CONFIG_DEBUG_FS) > void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/scheduler: Change scheduled fence track @ 2021-04-26 6:27 Roy Sun 2021-04-26 6:27 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 0 siblings, 1 reply; 22+ messages in thread From: Roy Sun @ 2021-04-26 6:27 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Update the timestamp of scheduled fence on HW completion of the previous fences This allow more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto <david.nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index 92d8de24d0a1..f8e39ab0c41b 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched) EXPORT_SYMBOL(drm_sched_resubmit_jobs); /** - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list * * @sched: scheduler instance * @max: job numbers to relaunch @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched) static struct drm_sched_job * drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) { - struct drm_sched_job *job; + struct drm_sched_job *job, *next; /* * Don't destroy jobs while the timeout worker is running OR thread @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) if (job && dma_fence_is_signaled(&job->s_fence->finished)) { /* remove job from pending_list */ list_del_init(&job->list); We just need to record the scheduled time of the next job. So we need not to check the rest job. + /* account for the next fence in the queue */ + next = list_first_entry_or_null(&sched->pending_list, + struct drm_sched_job, list); + if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, + &job->s_fence->finished.flags)) { + next->s_fence->scheduled.timestamp = + job->s_fence->finished.timestamp; + } } else { job = NULL; /* queue timeout for next job */ -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface 2021-04-26 6:27 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun @ 2021-04-26 6:27 ` Roy Sun 0 siblings, 0 replies; 22+ messages in thread From: Roy Sun @ 2021-04-26 6:27 UTC (permalink / raw) To: amd-gfx; +Cc: Roy Sun, David M Nieto Tracking devices, process info and fence info using /proc/pid/fdinfo Signed-off-by: David M Nieto <David.Nieto@amd.com> Signed-off-by: Roy Sun <Roy.Sun@amd.com> --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 61 ++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 104 +++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 +++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 ++++ drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 45 +++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 + 11 files changed, 288 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index ee85e8aba636..d216b7ecb5d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \ amdgpu_fw_attestation.o amdgpu_securedisplay.o +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o + amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o # add asic specific block diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 125b25a5ce5b..3365feae15e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -107,6 +107,7 @@ #include "amdgpu_gfxhub.h" #include "amdgpu_df.h" #include "amdgpu_smuio.h" +#include "amdgpu_fdinfo.h" #define MAX_GPU_INSTANCE 16 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c index 0350205c4897..01fe60fedcbe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr) idr_destroy(&mgr->ctx_handles); mutex_destroy(&mgr->lock); } + +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max) +{ + ktime_t now, t1; + uint32_t i; + + now = ktime_get(); + for (i = 0; i < amdgpu_sched_jobs; i++) { + struct dma_fence *fence; + struct drm_sched_fence *s_fence; + + spin_lock(&ctx->ring_lock); + fence = dma_fence_get(centity->fences[i]); + spin_unlock(&ctx->ring_lock); + if (!fence) + continue; + s_fence = to_drm_sched_fence(fence); + if (!dma_fence_is_signaled(&s_fence->scheduled)) + continue; + t1 = s_fence->scheduled.timestamp; + if (t1 >= now) + continue; + if (dma_fence_is_signaled(&s_fence->finished) && + s_fence->finished.timestamp < now) + *total += ktime_sub(s_fence->finished.timestamp, t1); + else + *total += ktime_sub(now, t1); + t1 = ktime_sub(now, t1); + dma_fence_put(fence); + *max = max(t1, *max); + } +} + +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed) +{ + struct idr *idp; + struct amdgpu_ctx *ctx; + uint32_t id; + struct amdgpu_ctx_entity *centity; + ktime_t total = 0, max = 0; + + if (idx >= AMDGPU_MAX_ENTITY_NUM) + return 0; + idp = &mgr->ctx_handles; + mutex_lock(&mgr->lock); + idr_for_each_entry(idp, ctx, id) { + if (!ctx->entities[hwip][idx]) + continue; + + centity = ctx->entities[hwip][idx]; + amdgpu_ctx_fence_time(ctx, centity, &total, &max); + } + + mutex_unlock(&mgr->lock); + if (elapsed) + *elapsed = max; + + return total; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h index f54e10314661..10dcf59a5c6b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr); long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout); void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); - +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip, + uint32_t idx, uint64_t *elapsed); +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity, + ktime_t *total, ktime_t *max); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0369d3532bf0..01603378dbc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -42,7 +42,7 @@ #include "amdgpu_irq.h" #include "amdgpu_dma_buf.h" #include "amdgpu_sched.h" - +#include "amdgpu_fdinfo.h" #include "amdgpu_amdkfd.h" #include "amdgpu_ras.h" @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = { #ifdef CONFIG_COMPAT .compat_ioctl = amdgpu_kms_compat_ioctl, #endif +#ifdef CONFIG_PROC_FS + .show_fdinfo = amdgpu_show_fdinfo +#endif }; int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c new file mode 100644 index 000000000000..dbebbe16e3b3 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: MIT +/* Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ + +#include <linux/debugfs.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/uaccess.h> +#include <linux/reboot.h> +#include <linux/syscalls.h> + +#include <drm/amdgpu_drm.h> +#include <drm/drm_debugfs.h> + +#include "amdgpu.h" +#include "amdgpu_vm.h" +#include "amdgpu_gem.h" +#include "amdgpu_ctx.h" +#include "amdgpu_fdinfo.h" + + +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = { + [AMDGPU_HW_IP_GFX] = "gfx", + [AMDGPU_HW_IP_COMPUTE] = "compute", + [AMDGPU_HW_IP_DMA] = "dma", + [AMDGPU_HW_IP_UVD] = "dec", + [AMDGPU_HW_IP_VCE] = "enc", + [AMDGPU_HW_IP_UVD_ENC] = "enc_1", + [AMDGPU_HW_IP_VCN_DEC] = "dec", + [AMDGPU_HW_IP_VCN_ENC] = "enc", + [AMDGPU_HW_IP_VCN_JPEG] = "jpeg", +}; + +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) +{ + struct amdgpu_fpriv *fpriv; + uint32_t bus, dev, fn, i, domain; + uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0; + struct drm_file *file = f->private_data; + struct amdgpu_device *adev = drm_to_adev(file->minor->dev); + int ret; + + ret = amdgpu_file_to_fpriv(f, &fpriv); + if (ret) + return; + bus = adev->pdev->bus->number; + domain = pci_domain_nr(adev->pdev->bus); + dev = PCI_SLOT(adev->pdev->devfn); + fn = PCI_FUNC(adev->pdev->devfn); + + ret = amdgpu_bo_reserve(fpriv->vm.root.base.bo, false); + if (ret) { + DRM_ERROR("Fail to reserve bo\n"); + return; + } + amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, >t_mem, &cpu_mem); + amdgpu_bo_unreserve(fpriv->vm.root.base.bo); + seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus, + dev, fn, fpriv->vm.pasid); + seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); + seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); + seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL); + for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { + uint32_t count = amdgpu_ctx_num_entities[i]; + int idx = 0; + uint64_t total = 0, min = 0; + uint32_t perc, frac; + + for (idx = 0; idx < count; idx++) { + total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr, + i, idx, &min); + if ((total == 0) || (min == 0)) + continue; + + perc = div64_u64(10000 * total, min); + frac = perc % 100; + + seq_printf(m, "%s%d:\t%d.%d%%\n", + amdgpu_ip_name[i], + idx, perc/100, frac); + } + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h new file mode 100644 index 000000000000..41a4c7056729 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: David Nieto + * Roy Sun + */ +#ifndef __AMDGPU_SMI_H__ +#define __AMDGPU_SMI_H__ + +#include <linux/idr.h> +#include <linux/kfifo.h> +#include <linux/rbtree.h> +#include <drm/gpu_scheduler.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_bo_driver.h> +#include <linux/sched/mm.h> + +#include "amdgpu_sync.h" +#include "amdgpu_ring.h" +#include "amdgpu_ids.h" + +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f); + +#endif diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index da6d4ee0a132..745fcf3ea450 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -1269,6 +1269,26 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, trace_amdgpu_bo_move(abo, new_mem->mem_type, old_mem->mem_type); } +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem) +{ + unsigned int domain; + + domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); + switch (domain) { + case AMDGPU_GEM_DOMAIN_VRAM: + *vram_mem += amdgpu_bo_size(bo); + break; + case AMDGPU_GEM_DOMAIN_GTT: + *gtt_mem += amdgpu_bo_size(bo); + break; + case AMDGPU_GEM_DOMAIN_CPU: + default: + *cpu_mem += amdgpu_bo_size(bo); + break; + } +} + /** * amdgpu_bo_release_notify - notification about a BO being released * @bo: pointer to a buffer object diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h index e0ec48d6a3fd..456e6d09bc98 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h @@ -307,6 +307,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr); u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo); u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo); int amdgpu_bo_validate(struct amdgpu_bo *bo); +void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem); int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow, struct dma_fence **fence); uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index dae51992c607..2db8dc7c84f7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -25,6 +25,7 @@ * Alex Deucher * Jerome Glisse */ + #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> @@ -1740,6 +1741,50 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, return r; } +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem) +{ + struct amdgpu_bo_va *bo_va, *tmp; + + list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + spin_lock(&vm->invalidated_lock); + list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) { + if (!bo_va->base.bo) + continue; + amdgpu_bo_get_memory(bo_va->base.bo, vram_mem, + gtt_mem, cpu_mem); + } + spin_unlock(&vm->invalidated_lock); +} /** * amdgpu_vm_bo_update - update all BO mappings in the vm page table * diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index e5a3f18be2b7..ea60ec122b51 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -454,6 +454,8 @@ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm); void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo); +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem, + uint64_t *gtt_mem, uint64_t *cpu_mem); #if defined(CONFIG_DEBUG_FS) void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m); -- 2.31.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
end of thread, other threads:[~2021-04-26 6:27 UTC | newest] Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-04-12 12:57 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-12 12:57 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-12 13:09 ` Christian König 2021-04-13 12:14 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-13 12:14 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-13 12:54 ` Christian König 2021-04-14 13:59 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-14 13:59 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-14 14:33 ` Christian König 2021-04-16 5:04 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-16 5:04 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-19 6:26 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-19 6:26 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-20 8:53 ` Sun, Roy 2021-04-20 9:32 ` Deng, Emily 2021-04-20 9:57 ` Christian König 2021-04-20 11:51 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-20 11:51 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-20 12:02 ` Christian König 2021-04-21 3:46 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-21 3:46 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-21 4:35 ` Nieto, David M 2021-04-21 8:03 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-21 8:03 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-23 9:19 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-23 9:19 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-23 9:32 ` Christian König 2021-04-23 10:55 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-23 10:55 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun 2021-04-23 11:36 ` Christian König 2021-04-26 6:27 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun 2021-04-26 6:27 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun
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