From: Qingqing Zhuo <qingqing.zhuo@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: markyacoub@chromium.org, Rodrigo.Siqueira@amd.com,
daniel.wheeler@amd.com, bas@basnieuwenhuizen.nl,
alexander.deucher@amd.com, nicholas.kazlauskas@amd.com
Subject: [PATCH 1/2] drm/amd/display: Update modifier list for gfx10_3
Date: Wed, 14 Apr 2021 19:35:32 -0400 [thread overview]
Message-ID: <20210414233533.24012-1-qingqing.zhuo@amd.com> (raw)
[Why]
Current list only includes modifiers where DCC_MAX_COMPRESSED_BLOCK
is set to AMD_FMT_MOD_DCC_BLOCK_128B, while AMD_FMT_MOD_DCC_BLOCK_64B
is also supported and used by userspace.
[How]
Add AMD_FMT_MOD_DCC_BLOCK_64B to modifiers with DCC supported.
Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index e29cb2e956db..c3cbc3d298e7 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4535,6 +4535,17 @@ add_gfx10_3_modifiers(const struct amdgpu_device *adev,
int pipe_xor_bits = ilog2(adev->gfx.config.gb_addr_config_fields.num_pipes);
int pkrs = ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs);
+ add_modifier(mods, size, capacity, AMD_FMT_MOD |
+ AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |
+ AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |
+ AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |
+ AMD_FMT_MOD_SET(PACKERS, pkrs) |
+ AMD_FMT_MOD_SET(DCC, 1) |
+ AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) |
+ AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |
+ AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |
+ AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B));
+
add_modifier(mods, size, capacity, AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |
AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |
@@ -4546,6 +4557,18 @@ add_gfx10_3_modifiers(const struct amdgpu_device *adev,
AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |
AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_128B));
+ add_modifier(mods, size, capacity, AMD_FMT_MOD |
+ AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |
+ AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |
+ AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |
+ AMD_FMT_MOD_SET(PACKERS, pkrs) |
+ AMD_FMT_MOD_SET(DCC, 1) |
+ AMD_FMT_MOD_SET(DCC_RETILE, 1) |
+ AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) |
+ AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |
+ AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |
+ AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B));
+
add_modifier(mods, size, capacity, AMD_FMT_MOD |
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |
AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |
--
2.17.1
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next reply other threads:[~2021-04-14 23:35 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-14 23:35 Qingqing Zhuo [this message]
2021-04-14 23:35 ` [PATCH 2/2] Revert "Revert "drm/amdgpu: Ensure that the modifier requested is supported by plane."" Qingqing Zhuo
2021-04-15 14:20 ` Mark Yacoub
2021-05-09 12:10 ` youling257
2021-05-09 15:52 ` Alex Deucher
2021-05-09 20:51 ` youling 257
2021-05-09 20:57 ` Bas Nieuwenhuizen
2021-05-09 21:42 ` youling 257
2021-05-10 2:09 ` youling 257
2021-05-10 15:18 ` Mark Yacoub
2021-05-10 16:32 ` youling 257
2021-05-10 16:45 ` youling 257
2021-05-10 16:50 ` Mark Yacoub
2021-05-10 17:05 ` youling 257
2021-05-10 17:24 ` youling 257
2022-06-13 23:37 ` Mike Lothian
2021-05-10 17:30 ` youling 257
2021-04-15 11:25 ` [PATCH 1/2] drm/amd/display: Update modifier list for gfx10_3 Bas Nieuwenhuizen
2021-04-15 16:06 ` Zhuo, Qingqing
2021-04-15 16:27 ` Bas Nieuwenhuizen
2021-04-15 17:37 ` Zhuo, Qingqing
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